PIC18F24J11-I/SO Microchip Technology, PIC18F24J11-I/SO Datasheet - Page 362

• Manufacturer Part Number: PIC18F24J11-I/SO
• Description: IC PIC MCU FLASH 16K 2V 28-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F24J11-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 16KB (8K x 16)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3776 B
• Interface Type: EUSART, I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, DM183033, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• Package: 28SOIC W
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MILAC164332 - MODULE SKT FOR 28SOIC 18F45J10
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F46J11 FAMILY
21.7
When a comparator is active and the device is placed
in Sleep mode, the comparator remains active and the
interrupt is functional if enabled. This interrupt will
wake-up the device from Sleep mode when enabled.
Each operational comparator will consume additional
current. To minimize power consumption while in Sleep
mode, turn off the comparators (CON = 0) before
entering Sleep. If the device wakes up from Sleep, the
contents of the CMxCON register are not affected.
TABLE 21-3:
DS39932C-page 362
INTCON
PIR2
PIE2
IPR2
CMxCON
CVRCON
CMSTAT
ANCON0
PORTA
TRISA
Legend:
Note 1:
Name
Comparator Operation During
Sleep
(1)
These bits and/or registers are not implemented on 28-pin devices.
— = unimplemented, read as ‘0’, r = reserved. Shaded cells are not related to comparator operation.
GIE/GIEH PEIE/GIEL
PCFG7
OSCFIF
OSCFIE
OSCFIP
CVREN
TRISA7
Bit 7
CON
REGISTERS ASSOCIATED WITH COMPARATOR MODULE
RA7
—
(1)
PCFG6
CVROE
TRISA6
CM2IF
CM2IE
CM2IP
Bit 6
COE
RA6
—
(1)
PCFG5
TMR0IE
TRISA5
CM1IE
CM1IP
CM1IF
CVRR
CPOL
Bit 5
RA5
—
(1)
EVPOL1
CVRSS
PCFG4
INT0IE
Bit 4
—
—
—
—
—
—
EVPOL0
21.8
A device Reset forces the CMxCON registers to their
Reset state. This forces both comparators and the
voltage reference to the OFF state.
TRISA3
BCL1IF
BCL1IE
BCL1IP
PCFG3
CVR3
RBIE
Bit 3
RA3
—
Effects of a Reset
TMR0IF
TRISA2
PCFG2
LVDIE
LVDIP
LVDIF
CREF
CVR2
Bit 2
RA2
—
TMR3IE
TMR3IP
TMR3IF
COUT2
TRISA1
PCFG1
INT0IF
© 2009 Microchip Technology Inc.
CCH1
CVR1
Bit 1
RA1
CCP2IF
CCP2IE
CCP2IP
COUT1
TRISA0
PCFG0
CCH0
CVR0
RBIF
Bit 0
RA0
on Page:
Values
Reset
63
65
65
65
64
68
67
68
66
66