PIC16F1937-I/ML Microchip Technology, PIC16F1937-I/ML Datasheet - Page 14

IC PIC MCU FLASH 512KX14 44-QFN

PIC16F1937-I/ML

Manufacturer Part Number
PIC16F1937-I/ML
Description
IC PIC MCU FLASH 512KX14 44-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr

Specifications of PIC16F1937-I/ML

Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Controller Family/series
PIC16F
No. Of I/o's
36
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
32MHz
No. Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16F193X/LF193X/PIC16F194X/LF194X/
REGISTER 3-2:
DS41397B-page 14
bit 13
bit 6
Legend:
R = Readable bit
-n = Value at POR
bit 13
bit 12
bit 11
bit 10-9
bit 8
bit 7
bit 6
bit 5
Note 1:
R/P-1
FCMEN
MCLRE
(4)
R/P-1
(4)
(4)
2:
3:
4:
5:
(4)
Enabling Brown-out Reset does not automatically enable Power-up Timer.
The entire data EEPROM will be erased when the code protection is turned off during an erase.
The entire program memory will be erased when the code protection is turned off.
Unemplemented on PIC16LF190X devices. This bit reads as ‘1’.
For PIC16LF190X only.
FCMEN: Fail-Safe Clock Monitor Enable bit
1 = Fail-Safe Clock Monitor is enabled
0 = Fail-Safe Clock Monitor is disabled
IESO: Internal External Switchover bit
1 = Internal/External Switchover mode is enabled
0 = Internal/External Switchover mode is disabled
CLKOUTEN: Clock Out Enable bit
1 = CLKOUT function is disabled. I/O or oscillator function on RA6/CLKOUT
0 = CLKOUT function is enabled on RA6/CLKOUT
BOREN<1:0>: Brown-out Reset Enable bits
11 = BOR enabled
10 = BOR enabled during operation and disabled in Sleep
01 = BOR controlled by SBOREN bit of the PCON register
00 = BOR disabled
CPD: Data Code Protection bit
1 = Data memory code protection is disabled
0 = Data memory code protection is enabled
CP: Code Protection bit
1 = Program memory code protection is disabled
0 = Program memory code protection is enabled
MCLRE: MCLR/V
If LVP bit = 1:
If LVP bit = 0:
PWRTE: Power-up Timer Enable bit
1 = PWRT disabled
0 = PWRT enabled
R/P-1
PWRTE
This bit is ignored.
1 = MCLR/V
0 = MCLR/V
R/P-1
CONFIGURATION WORD 1
IESO
port pin’s WPU control bit.
(4)
PP
PP
W = Writable bit
‘1’ = Bit is set
PP
CLKOUTEN
pin function is MCLR; Weak pull-up enabled.
pin function is digital input; MCLR internally disabled; Weak pull-up under control of
WDTE1
Pin Function Select bit
R/P-1
R/P-1
(3)
(2)
(1)
BOREN1
WDTE0
R/P-1
R/P-1
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
BOREN0
R/P-1
FOSC2
R/P-1
(4)
 2010 Microchip Technology Inc.
R/P-1
FOSC1
R/P-1
CPD
(4)
FOSC0
R/P-1
R/P-1
CP
bit 7
bit 0

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