PIC18F14K50-I/SS Microchip Technology, PIC18F14K50-I/SS Datasheet - Page 307

IC PIC MCU FLASH 8KX16 20-SSOP

PIC18F14K50-I/SS

Manufacturer Part Number
PIC18F14K50-I/SS
Description
IC PIC MCU FLASH 8KX16 20-SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F14K50-I/SS

Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
20-SSOP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
14
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
16 bit
Data Ram Size
768 B
Interface Type
EUSART, I2C, MSSP, SPI, USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
15
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Package
20SSOP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC244023 - PROC EXTENS PAK PIC18F1XK50DV164126 - KIT DEVELOPMENT USB W/PICKIT 2DM164127 - KIT DEVELOPMENT USB 18F14/13K50AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPXLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC164307 - MODULE SKT FOR PM3 28SSOP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Quantity
Price
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IR
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0
24.3.2
The entire data EEPROM is protected from external
reads and writes by two bits: CPD and WRTD. CPD
inhibits external reads and writes of data EEPROM.
WRTD inhibits internal and external writes to data
EEPROM. The CPU can always read data EEPROM
under normal operation, regardless of the protection bit
settings.
24.3.3
The Configuration registers can be write-protected.
The WRTC bit controls protection of the Configuration
registers. In normal execution mode, the WRTC bit is
readable only. WRTC can only be written via ICSP or
an external programmer.
24.4
Eight memory locations (200000h-200007h) are
designated as ID locations, where the user can store
checksum or other code identification numbers. These
locations are both readable and writable during normal
execution through the TBLRD and TBLWT instructions
or during program/verify. The ID locations can be read
when the device is code-protected.
24.5
PIC18F/LF1XK50 devices can be serially programmed
while in the end application circuit. This is simply done
with two lines for clock and data and three other lines
for power, ground and the programming voltage. This
allows
unprogrammed devices and then program the
microcontroller just before shipping the product. This
also allows the most recent firmware or a custom
firmware to be programmed.
24.6
When the DEBUG Configuration bit is programmed to
a ‘0’, the In-Circuit Debugger functionality is enabled.
This function allows simple debugging functions when
used with MPLAB
this feature enabled, some resources are not available
for general use.
required by the background debugger.
TABLE 24-4:
 2010 Microchip Technology Inc.
I/O pins:
Stack:
Program Memory:
Data Memory:
customers
ID Locations
In-Circuit Debugger
In-Circuit Serial Programming
DATA EEPROM
CODE PROTECTION
CONFIGURATION REGISTER
PROTECTION
Table 24-4
®
DEBUGGER RESOURCES
IDE. When the microcontroller has
to
manufacture
shows which resources are
RA0, RA1
2 levels
512 bytes
10 bytes
boards
with
Preliminary
To use the In-Circuit Debugger function of the
microcontroller, the design must implement In-Circuit
Serial Programming connections to the following pins:
• MCLR/V
• V
• V
• RA0
• RA1
This will interface to the In-Circuit Debugger module
available from Microchip or one of the third party
development tool companies.
24.7
The LVP Configuration bit enables Single-Supply ICSP
Programming (formerly known as Low-Voltage ICSP
Programming
Programming is enabled, the microcontroller can be
programmed without requiring high voltage being
applied to the MCLR/V
is then dedicated to controlling Program mode entry and
is not available as a general purpose I/O pin.
While programming, using Single-Supply Programming
mode, V
normal execution mode. To enter Programming mode,
V
If Single-Supply ICSP Programming mode will not be
used, the LVP bit can be cleared. RC3/PGM then
becomes available as the digital I/O pin, RC3. The LVP
bit may be set or cleared only when using standard
high-voltage programming (V
V
standard high-voltage programming is available and
must be used to program the device.
Memory that is not code-protected can be erased using
either a block erase, or erased row by row, then written
at any specified V
erased, a block erase is required.
DD
PP
Note 1: High-voltage programming is always
DD
SS
/RA3 pin). Once LVP has been disabled, only the
is applied to the PGM pin.
DD
2: By
3: When Single-Supply Programming is
4: When LVP is enabled, externally pull the
Single-Supply ICSP Programming
PIC18F/LF1XK50
PP
is applied to the MCLR/V
available, regardless of the state of the
LVP bit or the PGM pin, by applying V
to the MCLR pin.
enabled in unprogrammed devices (as
supplied from Microchip) and erased
devices.
enabled, the RC3 pin can no longer be
used as a general purpose I/O pin.
PGM pin to V
execution.
/RA3
or
DD
default,
. If code-protected memory is to be
PP
LVP).
/RA3 pin, but the RC3/PGM pin
SS
Single-Supply
to allow normal program
IHH
When
applied to the MCLR/
DS41350E-page 307
PP
/RA3 pin as in
Single-Supply
ICSP
IHH
is

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