ATTINY24-20MU Atmel, ATTINY24-20MU Datasheet - Page 24

IC MCU AVR 2K FLASH 20MHZ 20-QFN

ATTINY24-20MU

Manufacturer Part Number
ATTINY24-20MU
Description
IC MCU AVR 2K FLASH 20MHZ 20-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY24-20MU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
12
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-MLF®, QFN
Processor Series
ATTINY2x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
USI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
For Use With
ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK505 - ADAPTER KIT FOR 14PIN AVR MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY24-20MU
Manufacturer:
AVNET
Quantity:
20 000
6. Clock System
6.1
6.1.1
24
Clock Subsystems
ATtiny24/44/84
CPU Clock – clk
Figure 6-1
need not be active at a given time. In order to reduce power consumption, the clocks to modules
not being used can be halted by using different sleep modes, as described in
ment and Sleep Modes” on page
Figure 6-1.
The clock subsystems are detailed in the sections below.
The CPU clock is routed to parts of the system concerned with operation of the AVR core.
Examples of such modules are the General Purpose Register File, the Status Register and the
Data memory holding the Stack Pointer. Halting the CPU clock inhibits the core from performing
general operations and calculations.
CPU
ADC
External Clock
presents the principal clock systems in the AVR and their distribution. All of the clocks
clk
clk
ADC
I/O
Clock Distribution
Source clock
General I/O
System Clock
Modules
Control Unit
AVR Clock
Multiplexer
Prescaler
Clock
Calibrated RC
Oscillator
Oscillator
Crystal
33.
Reset Logic
CPU Core
clk
clk
CPU
FLASH
Crystal Oscillator
Low-Frequency
Watchdog Timer
Watchdog clock
RAM
Watchdog
Oscillator
Flash and
EEPROM
“Power Manage-
Calibrated RC
Oscillator
8006K–AVR–10/10

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