PIC18F24K20-I/SS Microchip Technology, PIC18F24K20-I/SS Datasheet - Page 203

IC PIC MCU FLASH 8KX16 28SSOP

PIC18F24K20-I/SS

Manufacturer Part Number
PIC18F24K20-I/SS
Description
IC PIC MCU FLASH 8KX16 28SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F24K20-I/SS

Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
28-SSOP
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
CCP/ECCP/EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Operating Supply Voltage
3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
11-ch x 10-bit
Package
28SSOP
Device Core
PIC
Family Name
PIC18
Maximum Speed
64 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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REGISTER 17-3:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
Master mode
bit 7-0
10-Bit Slave mode: Most significant address byte
bit 7-3
bit 2-1
bit 0
10-Bit Slave mode: Least significant address byte
bit 7-0
7-Bit Slave mode
bit 7-1
bit 0
R/W-0
ADD7
ADD<7:0>: Baud Rate Clock Divider bits
SCL pin clock period = ((ADD<7:0> + 1) *4)/F
Not used: Unused for most significant address byte. Bit state of this register is a don’t care. Bit pattern
sent by master is fixed by I
compared by hardware and are not affected by the value in this register.
ADD<9:8>: Two most significant bits of 10-bit address
Not used: Unused in this mode. Bit state is a “don’t care”.
ADD<7:0>: Eight least significant bits of 10-bit address
ADD<7:1>: 7-bit address
Not used: Unused in this mode. Bit state is a “don’t care”.
R/W-0
ADD6
SSPADD: MSSP ADDRESS AND BAUD RATE REGISTER (I
W = Writable bit
‘1’ = Bit is set
R/W-0
ADD5
2
C specification and must be equal to ‘11110’. However, those bits are
R/W-0
ADD4
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
OSC
R/W-0
ADD3
PIC18F2XK20/4XK20
R/W-0
ADD2
x = Bit is unknown
2
R/W-0
ADD1
C MODE)
DS41303G-page 203
R/W-0
ADD0
bit 0

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