PIC16HV540-20/SO Microchip Technology, PIC16HV540-20/SO Datasheet - Page 16

IC MCU OTP 512X12 18SOIC

PIC16HV540-20/SO

Manufacturer Part Number
PIC16HV540-20/SO
Description
IC MCU OTP 512X12 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr

Specifications of PIC16HV540-20/SO

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
12
Program Memory Size
768B (512 x 12)
Program Memory Type
OTP
Ram Size
25 x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 15 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
18-SOIC (7.5mm Width)
Processor Series
PIC16H
Core
PIC
Data Bus Width
8 bit
Data Ram Size
25 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
8
Operating Supply Voltage
3.5 V to 15 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
For Use With
309-1075 - ADAPTER 18-SOIC TO 18-SOICAC164002 - MODULE SKT PROMATEII 18/28SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
PIC16HV540
4.6
As a program instruction is executed, the Program
Counter (PC) will contain the address of the next pro-
gram instruction to be executed. The PC value is
increased by one every instruction cycle, unless an
instruction changes the PC.
For a GOTO instruction, bits 8:0 of the PC are provided
by the GOTO instruction word. (Figure 4-3).
For a CALL instruction, or any instruction where the
PCL is the destination, bits 7:0 of the PC again are pro-
vided by the instruction word. However, PC<8> does
not come from the instruction word, but is always
cleared (Figure 4-3).
Instructions where the PCL is the destination, or Modify
PCL instructions, include MOVWF PC, ADDWF PC, and
BSF PC, 5. .
FIGURE 4-3:
DS40197B-page 16
GOTO Instruction
CALL or Modify PCL Instruction
Note:
X - Not used
X - Not used
PC
PC
Program Counter
Because PC<8> is cleared in the CALL
instruction, or any Modify PCL instruction,
all subroutine calls or computed jumps are
limited to the first 256 locations of any pro-
gram memory page (512 words long).
11
11
X
X
10
10
X
X
Reset to ’0’
LOADING OF PC
BRANCH INSTRUCTIONS -
PIC16HV540
9
X
9
X
8
8
7
7
Instruction Word
Instruction Word
PCL
PCL
0
0
Preliminary
4.6.1
The Program Counter is set upon a RESET, which
means that the PC addresses the last location in the
last page i.e., the reset vector.
The STATUS register page preselect bits are cleared
upon a RESET, which means that page 0 is pre-
selected.
Therefore, upon a RESET, a GOTO instruction at the
reset vector location will automatically cause the pro-
gram to jump to page 0.
4.7
PIC16HV540 device has a 12-bit wide L.I.F.O. (last in,
first out) hardware 4 level stack.
A CALL instruction will push the current value of stack
1 into stack 2 and then push the current program
counter value, incremented by one, into stack level 1. If
more than four sequential CALL’s are executed, only
the most recent four return addresses are stored.
A RETLW instruction will pop the contents of stack level
1 into the program counter and then copy stack level 2
contents into level 1. If more than four sequential
RETLW’s are executed, the stack will be filled with the
address previously stored in level 4. Note that the
W register will be loaded with the literal value specified
in the instruction. This is particularly useful for the
implementation of data look-up tables within the
program memory.
Upon any reset, the contents of the stack remain
unchanged, however the program counter (PCL) will
also be reset to 0.
Note 1: There are no STATUS bits to indicate
Note 2: There are no instructions mnemonics
EFFECTS OF RESET
Stack
stack overflows or stack underflow condi-
tions.
called PUSH or POP. These are actions
that occur from the execution of the CALL
and RETLW instructions.
2000 Microchip Technology Inc.

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