AT89LS52-16JU Atmel, AT89LS52-16JU Datasheet - Page 20

IC MCU 8K FLASH 16MHZ 44-PLCC

AT89LS52-16JU

Manufacturer Part Number
AT89LS52-16JU
Description
IC MCU 8K FLASH 16MHZ 44-PLCC
Manufacturer
Atmel
Series
89LSr
Datasheet

Specifications of AT89LS52-16JU

Core Processor
8051
Core Size
8-Bit
Speed
16MHz
Connectivity
UART/USART
Peripherals
WDT
Number Of I /o
32
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 4 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 4 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
AT89ISP
Minimum Operating Temperature
- 40 C
Cpu Family
89LS
Device Core
8051
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
256Byte
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
4V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PLCC
Package
44PLCC
Family Name
89LS
Maximum Speed
16 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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16. Power-down Mode
20
AT89LS52
In the Power-down mode, the oscillator is stopped, and the instruction that invokes Power-down
is the last instruction executed. The on-chip RAM and Special Function Registers retain their
values until the Power-down mode is terminated. Exit from Power-down mode can be initiated
either by a hardware reset or by activation of an enabled external interrupt (INT0 or INT1). Reset
redefines the SFRs but does not change the on-chip RAM. The reset should not be activated
before V
the oscillator to restart and stabilize.
Figure 16-1. Oscillator Connections
Note:
Figure 16-2. External Clock Drive Configuration
CC
C1, C2 = 30 pF ± 10 pF for Crystals
is restored to its normal operating level and must be held active long enough to allow
= 40 pF ± 10 pF for Ceramic Resonators
OSCILLATOR
EXTERNAL
SIGNAL
NC
C2
C1
XTAL2
XTAL1
GND
XTAL2
XTAL1
GND
2601C–MICRO–06/08

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