PIC16F716-I/P Microchip Technology, PIC16F716-I/P Datasheet - Page 40

• Manufacturer Part Number: PIC16F716-I/P
• Description: IC PIC MCU FLASH 2KX14 18DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F716-I/P

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 18-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 13
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: RS- 232/USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4-ch x 8-bit
• Package: 18PDIP
• Device Core: PIC
• Family Name: PIC16
• Maximum Speed: 20 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: I3-DB16F716 - BOARD DAUGHTER ICEPIC3AC162054 - HEADER INTERFACE ICD2 16F716ACICE0202 - ADAPTER MPLABICE 18P 300 MILAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16F716
7.1
When configuring and using the ADC the following
functions must be considered:
• Port configuration
• Channel selection
• ADC voltage reference selection
• ADC conversion clock source
• Interrupt control
7.1.1
The ADC can be used to convert both analog and digital
signals. When converting analog signals, the I/O pin
should be configured for analog by setting the associated
TRIS and ADCON1 bits. See the corresponding Port
section for more information.
7.1.2
The CHS bits of the ADCON0 register determine which
channel is connected to the sample and hold circuit.
When changing channels, a delay is required before
starting the next conversion. Refer to Section 7.2
“ADC Operation” for more information.
TABLE 7-1:
DS41206B-page 38
Operation
2 T
8 T
32 T
RC
Legend: Shaded cells are outside of recommended range.
Note 1:
Note:
OSC
OSC
OSC
2:
3:
4:
AD Clock Source (T
ADC Configuration
The RC source has a typical T
These values violate the minimum required T
For faster conversion times, the selection of another clock source is recommended.
When device frequency is greater than 1 MHz, the RC A/D conversion clock source is recommended for
Sleep operation only.
PORT CONFIGURATION
Analog voltages on any pin that is defined
as a digital input may cause the input
buffer to conduct excess current.
CHANNEL SELECTION
T
AD
vs. DEVICE OPERATING FREQUENCIES
ADCS<1:0>
00
01
10
11
AD
)
AD
2-6 μs
100 ns
400 ns
time of 4 μs.
20 MHz
1.6 μs
(1), (4)
(2)
(2)
AD
time.
2-6 μs
7.1.3
The PCFG bits of the ADCON0 register provide
independent control of the positive voltage reference.
The positive voltage reference can be either V
external voltage source.
7.1.4
The source of the conversion clock is software select-
able via the ADCS bits of the ADCON0 register. There
are four possible clock options:
• F
• F
• F
• F
The time to complete one bit conversion is defined as
T
For correct conversion, the appropriate T
must be met. See A/D conversion requirements in
Section 12.0 “Electrical Characteristics” for more
information. Table 7-1 gives examples of appropriate
ADC clock selections.
400 ns
AD
5 MHz
Note:
1.6 μs
6.4 μs
OSC
OSC
OSC
RC
. One full 8-bit conversion requires 9.5 T
Device Frequency
(1), (4)
(dedicated internal oscillator)
/2
/8
/32
(2)
ADC V
Unless using the F
system clock frequency will change the
ADC
adversely affect the ADC result.
CONVERSION CLOCK
2-6 μs
clock
OLTAGE REFERENCE
1.25 MHz
25.6 μs
1.6 μs
6.4 μs
© 2007 Microchip Technology Inc.
(1), (4)
frequency,
(3)
RC
, any changes in the
333.33 kHz
AD
2-6 μs
which
24 μs
96 μs
specification
6 μs
AD
DD
periods.
(3)
(3)
(1)
or an
may