sy100s834l Micrel Semiconductor, sy100s834l Datasheet

sy100s834l

Manufacturer Part Number

sy100s834l

Description

Clock Generation Chip

Manufacturer

Micrel Semiconductor

Datasheet

1.SY100S834L.pdf (5 pages)

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Micrel, Inc.

Notes:

Z = LOW-to-HIGH transition

ZZ = HIGH-to-LOW transition

Precision Edge is a registered trademark of Micrel, Inc.

M9999-032206

hbwhelp@micrel.com or (408) 955-1690

FEATURES

TRUTH TABLE

PIN NAMES

3.3V and 5V power supply options

50ps output-to-output skew

Synchronous enable/disable

Master Reset for synchronization

Internal 75K input pull-down resistors

Available in 16-pin SOIC package

SEL

CLK

SEL

Divide by 2

Divide by 1

Outputs

Differential Clock Inputs

Function Select

Synchronous Enable

Master Reset

Reference Output

Differential 1 or 2 Outputs

Differential 2 or 4 Outputs

Differential 4 or 8 Outputs

Divide by 4

Divide by 2

Outputs

Function

Divide

Hold Q

Reset Q

Function

Divide by 8

Divide by 4

0–2

Outputs

0–2

( 1, 2, 4) OR ( 2, 4, 8)

CLOCK GENERATION CHIP

skew clock generation applications. The internal dividers

are synchronous to each other, therefore, the common

output edges are all precisely aligned. The devices can

be driven by either a differential or single-ended ECL or,

if positive power supplies are used, PECL input signal.

In addition, by using the V

can be AC-coupled into the device. If a single-ended

input is to be used, the V

to the CLK input and bypassed to ground via a 0.01 F

capacitor. The V

switching reference for the input of the SY100S834/L

under single-ended input conditions. As a result, this pin

can only source/sink up to 0.5mA of current.

what clock generation chip function is. When FS

is LOW, SY100S834/L functions as a divide by 2, by 4

and by 8 clock generation chip. However, if FS

is HIGH, it functions as a divide by 1, by 2 and by 4

clock generation chip. This latter feature will increase

the clock frequency by two folds.

internal dividers will only be enabled/disabled when the

internal clock is already in the LOW state. This avoids

any chance of generating a runt clock pulse on the

internal clock when the device is enabled/disabled as

can happen with an asynchronous control. An internal

runt pulse could lead to losing synchronization between

the internal divider stages. The internal enable flip-flop is

clocked on the falling edge of the input clock, therefore,

all associated specification limits are referenced to the

negative edge of the clock input.

state; the master reset (MR) input allows for the

synchronization of the internal dividers, as well as for

multiple SY100S834/Ls in a system.

4, 8) clock generation chip designed explicitly for low

DESCRIPTION

The SY100S834/L is low skew ( 1, 2, 4) or ( 2,

The Function Select (F

The common enable (EN) is synchronous so that the

Upon start-up, the internal flip-flops will attain a random

output is designed to act as the

SEL

output should be connected

) input is used to determine

output, a sinusoidal source

Precision Edge

SY100S834L

Rev.: G

Issue Date: March 2006

Precision Edge

SY100S834

Precision Edge®

SY100S834L

SY100S834

Amendment: /0

input

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sy100s834l Summary of contents

Page 1

... SY100S834/ system. 1 Precision Edge® SY100S834 Precision Edge SY100S834L SY100S834 SY100S834L Precision Edge output, a sinusoidal source BB output should be connected BB output is designed to act as the BB ) input is used to determine ...

Page 2

... Industrial SY100S834ZI Industrial SY100S834LZI Industrial SY100S834LZI Industrial SY100S834ZG with Pb-Free bar-line indicator Pb-Free Industrial SY100S834ZG with Pb-Free bar-line indicator Pb-Free Industrial SY100S834LZG with Pb-Free bar-line indicator Pb-Free Industrial SY100S834LZG with Pb-Free bar-line indicator Pb-Free SY100S834 Lead Finish Sn-Pb Sn-Pb Sn-Pb Sn-Pb Sn-Pb Sn-Pb Sn-Pb Sn-Pb NiPdAu NiPdAu NiPdAu NiPdAu ...

Page 3

... The numbers in the spec table EE (min)I. CMR SY100S834 SY100S834L Max. Unit 54 mA -1.26 V 150 A Max. Unit ps 1010 50 ps — ps — ps — mV –0.4 V 525 ps ...

Page 4

... The outputs will transition to their next states in the same manner, time and relationship as they would have had the EN signal not been asserted. M9999-032206 hbwhelp@micrel.com or (408) 955-1690 Internal Clock Disabled 4 Precision Edge® SY100S834 SY100S834L ...

Page 5

... Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify M9999-032206 hbwhelp@micrel.com or (408) 955-1690 + 1 (408) 474-1000 FAX WEB Micrel for any damages resulting from such use or sale. © 2006 Micrel, Incorporated. 5 Precision Edge® Rev. 02 http://www.micrel.com SY100S834 SY100S834L ...

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