pi6c18551 Pericom Semiconductor Corporation, pi6c18551 Datasheet

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... Logic Block Diagram CLK_IN OE Description PI6C18551 is a low skew, low noise and high-speed clock buffer for computing, networking and communication applications. It generates four non-inverting buffered outputs from a single input. The outputs are controlled by output enable pin (OE). The outputs are disabled to tri-state mode when OE is LOW. For normal opera- tion the OE input should be set to HIGH ...

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... MHz, 4 output, CMOS Clock Buffer Descriptions Input clock with pull-up resistor Output clock Output clock Output clock Output clock GROUND 3. power supply Output Enable with pull-up resistor Min. Max. 7 -0.5 V +0.5 DD -0.5 V +0.5 DD -65 150 -40 85 260 PS8733D PI6C18551 Units V °C 08/29/05 ...

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... Rising edges @ 3.3V/5V, 160 MHz, 4 output, CMOS Clock Buffer Min. Typ. 3.135 0 2 192 −46 Min. Typ. Max (2) /2 PS8733D PI6C18551 Max. Units 3.465 3 0.7 DD 0.8 0.4 mA Ω kΩ mA Units 160 MHz 160 1.5 ns 1.5 8 250 ps 08/29/05 ...

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... Rising edges @ 3.3V/5V, 160 MHz, 4 output, CMOS Clock Buffer Min. Typ. Max. 4. 0.8 0 193 −90 Min. Typ. Max. 0 1.5 3 (2) /2 PS8733D PI6C18551 Units V mA Ω kΩ mA Units 135 MHz 135 1.5 ns 1.5 6 250 ps 08/29/05 ...

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... Package Type 8-pin SOIC Pb-free & Green, 8-pin SOIC PS8733D PI6C18551 ���� ���� 08/29/05 ...