mc33911 Freescale Semiconductor, Inc, mc33911 Datasheet

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mc33911

Manufacturer Part Number
mc33911
Description
Mc33911 Lin System Basis Chip With Dc Motor Pre-driver
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Freescale Semiconductor
Advance Information
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2007. All rights reserved.
LIN System Basis Chip with DC
Motor Pre-driver
Basis Chip (SBC) combining many frequently used functions in an
MCU-based system, plus a Local Interconnect Network (LIN)
transceiver. The 33911 has a 5.0V - 60mA low dropout regulator with
full protection and reporting features. The device provides full SPI-
readable diagnostics and a selectable timing watchdog for detecting
errant operation. The LIN Protocol Specification 2.0 compliant LIN
transceiver, has waveshaping circuitry that can be disabled for higher
data rates.
output protection are available for driving resistive and inductive loads.
All outputs can be pulse-width modulated (PWM). Two high-voltage
inputs are available for use in contact monitoring, or as external wake-
up inputs. These inputs can be used as high-voltage analog Inputs.
The voltage on theses pins is divided by a selectable ratio and
available via an analog multiplexer.
available), Sleep (V
cyclic sense, and forced wake-up), and Stop (V
current capability, wake-up via CS, LIN bus, wake-up inputs, cyclic
sense, forced wake-up, and external reset).
Features
• One 60mA high side switch and two 160mA low side switches
• Two high-voltage analog/logic inputs
• Full-duplex SPI Interface at frequencies up to 4MHz
• LIN transceiver capable of up to 100kbps with wave shaping
• Configurable window watchdog
• 5.0V low drop regulator with fault detection and low-voltage reset (LVR) circuitry
• Pb-free packaging designated by suffix code AC
The 33911 is a Serial Peripheral Interface (SPI)-controlled System
One 60mA high side switch and two 160mA low side switches with
The 33911 has three main operating modes: Normal (all functions
The 33911 is compatible with LIN Protocol Specification 2.0.
DD
off, wake-up via LIN, wake-up inputs (L1,L2),
V
BAT
MCU
Figure 1. 33911 Simplified Application Diagram
DD
on with limited
VS1
VS2
VDD
PWMIN
ADOUT0
MOSI
MISO
SCLK
CS
RXD
TXD
IRQ
RST
33911
WDCONF
VSENSE
HS1
LIN
LS1
LS2
L1
L2
MC33911BAC/R2
MC34911BAC/R2
Device
LIN INTERFACE
SYSTEM BASIS CHIP WITH LIN
ORDERING INFORMATION
AC SUFFIX (Pb-FREE)
2
M
ND
98ASH70029A
- 40°C to 125°C
32-PIN LQFP
- 40°C to 85°C
Document Number: MC33911
Temperature
33911
GENERATION
Range (T
A
)
Rev. 4.0, 2/2008
Package
32-LQFP

Related parts for mc33911

mc33911 Summary of contents

Page 1

... L1 L2 VDD PWMIN LS1 ADOUT0 MOSI LS2 MISO SCLK WDCONF CS RXD LIN INTERFACE TXD LIN IRQ RST Document Number: MC33911 Rev. 4.0, 2/2008 33911 ND 2 GENERATION AC SUFFIX (Pb-FREE) 98ASH70029A 32-PIN LQFP Temperature Package Range ( 40°C to 125°C 32-LQFP - 40°C to 85°C M ...

Page 2

INTERNAL BLOCK DIAGRAM RST IRQ INTERRUPT CONTROL MODULE LVI, HVI, HTI, OCI RESET CONTROL MODULE LVR, HVR, HTR, WD WINDOW WATCHDOG MODULE PWMIN MISO MOSI SPI & CONTROL SCLK CS ADOUT0 WAKE-UP MODULE RXD LIN PHYSICAL LAYER TXD LGND Figure ...

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RXD TXD MISO MOSI SCLK CS ADOUT0 PWMIN Table 1. 33911 Pin Definitions A functional description of each pin can be found in the Pin Pin Name 1 RXD Receiver Output 2 TXD Transmitter Input 3 MISO 4 MOSI 5 ...

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PIN CONNECTIONS Table 1. 33911 Pin Definitions A functional description of each pin can be found in the Pin Pin Name 12 WDCONF Configuration Pin 13 LIN 14 LGND 17 LS2 Low Side Outputs 19 LS1 18 PGND Power Ground ...

Page 5

Table 2. Maximum Ratings All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent damage to the device. Ratings ELECTRICAL RATINGS Supply Voltage at VS1 and VS2 Normal Operation (DC) Transient ...

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ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS Table 2. Maximum Ratings (continued) All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent damage to the device. Ratings THERMAL RATINGS (11) Operating Ambient Temperature Operating ...

Page 7

STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics Characteristics noted under conditions 5.5V ≤ V 34911, unless otherwise noted. Typical values noted reflect the approximate parameter mean at T conditions, unless otherwise noted. Characteristic SUPPLY VOLTAGE RANGE (VS1, VS2) Nominal ...

Page 8

ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics (continued) Characteristics noted under conditions 5.5V ≤ V 34911, unless otherwise noted. Typical values noted reflect the approximate parameter mean at T conditions, unless otherwise noted. Characteristic (24) VOLTAGE REGULATOR ...

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Table 3. Static Electrical Characteristics (continued) Characteristics noted under conditions 5.5V ≤ V 34911, unless otherwise noted. Typical values noted reflect the approximate parameter mean at T conditions, unless otherwise noted. Characteristic RST INPUT/OUTPUT PIN (RST) VDD Low-Voltage Reset Threshold ...

Page 10

ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics (continued) Characteristics noted under conditions 5.5V ≤ V 34911, unless otherwise noted. Typical values noted reflect the approximate parameter mean at T conditions, unless otherwise noted. Characteristic HIGH SIDE OUTPUT ...

Page 11

Table 3. Static Electrical Characteristics (continued) Characteristics noted under conditions 5.5V ≤ V 34911, unless otherwise noted. Typical values noted reflect the approximate parameter mean at T conditions, unless otherwise noted. Characteristic L1 AND L2 INPUT PINS (L1, L2) Low ...

Page 12

ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics (continued) Characteristics noted under conditions 5.5V ≤ V 34911, unless otherwise noted. Typical values noted reflect the approximate parameter mean at T conditions, unless otherwise noted. Characteristic RXD OUTPUT PIN ...

Page 13

DYNAMIC ELECTRICAL CHARACTERISTICS Table 4. Dynamic Electrical Characteristics Characteristics noted under conditions 5.5V ≤ V 34911, otherwise noted. Typical values noted reflect the approximate parameter mean at T unless otherwise noted. Characteristic SPI INTERFACE TIMING (see Figure 13, page SPI ...

Page 14

ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS Table 4. Dynamic Electrical Characteristics (continued) Characteristics noted under conditions 5.5V ≤ V 34911, otherwise noted. Typical values noted reflect the approximate parameter mean at T unless otherwise noted. Characteristic L1 AND L2 INPUTS Wake-Up ...

Page 15

Table 4. Dynamic Electrical Characteristics (continued) Characteristics noted under conditions 5.5V ≤ V 34911, otherwise noted. Typical values noted reflect the approximate parameter mean at T unless otherwise noted. Characteristic LIN PHYSICAL LAYER: DRIVER CHARACTERISTICS FOR FAST SLEW RATE LIN ...

Page 16

ELECTRICAL CHARACTERISTICS TIMING DIAGRAMS PGND Note Waveform per ISO 7637-2. Test Pulses 1, 2, 3a, 3b. Figure 4. Test Circuit for Transient Test Pulses (LIN) PGND NOTE: Figure 5. Test Circuit for Transient Test Pulses (Lx) TXD RXD Figure 6. ...

Page 17

TXD t BIT t BUS_DOM V LIN_REC t - MIN DOM 58.1% V 40.0% V LIN 28. MAX DOM RXD t RDOM Figure 7. LIN Timing Measurements for Normal Slew Rate TXD t BIT t BUS_DOM V ...

Page 18

ELECTRICAL CHARACTERISTICS TIMING DIAGRAMS V LIN_REC V BUSrec V BUSdom RXD t RX_PDF V LIN_REC LIN VDD V Vrec LIN_REC LIN IRQ 33911 18 LIN BUS SIGNAL t RX_PDR Figure 9. LIN Receiver Timing 0.4 V SUP DOMINANT LEVEL t ...

Page 19

V SUP V DD RST Figure 12. Power On Reset and Normal Request timeout Timing WSCLKH LEAD SCLK t SISU MOSI UNDEFINED t VALID t SOEN MISO D0 Analog Integrated Circuit Device Data Freescale Semiconductor t NRTOUT ...

Page 20

FUNCTIONAL DESCRIPTION INTRODUCTION The 33911 was designed and developed as a highly integrated and cost-effective solution for automotive and industrial applications. For automotive body electronics, the 33911 is well suited to perform relay control in applications like window lift, sunroof, ...

Page 21

INTERRUPT (IRQ) The IRQ pin is a digital output used to signal events or faults to the MCU while in Normal and Normal Request Mode or to signal a wake-up from Stop Mode. This active low output will transition high ...

Page 22

... FUNCTIONAL DESCRIPTION FUNCTIONAL INTERNAL BLOCK DESCRIPTION FUNCTIONAL INTERNAL BLOCK DESCRIPTION MC33911 - Functional Block Diagram MCU Interface and Output Control SPI Interface LIN Interface / Control Integrated Supply Analog Circuitry ANALOG CIRCUITRY The 33911 is designed to operate under automotive operating conditions. A fully configurable window watchdog circuit will reset the connected MCU in case of an overflow ...

Page 23

FUNCTIONAL DEVICE OPERATIONS INTRODUCTION The 33911 offers three main operating modes: Normal (Run), Stop, and Sleep (Low-power). In Normal Mode, the device is active and operating under normal application conditions. The Stop and Sleep Modes are low-power modes with wake-up ...

Page 24

FUNCTIONAL DEVICE OPERATIONS OPERATIONAL MODES Power Up POWER DOWN Legend WD: Watchdog WD Disabled: Watchdog disabled (WDCONF pin connected to GND) WD Trigger: Watchdog is triggered by SPI command WD Failed: No watchdog trigger or trigger occurs in closed window ...

Page 25

Table 5. Operating Modes Overview Function Reset Mode Normal Request Mode VDD Full LSx - HS1 - Analog Mux - Lx - LIN - Watchdog - VSENSE On Notes 55. Operation can be controlled by the PWMIN input. 56. HS ...

Page 26

FUNCTIONAL DEVICE OPERATIONS OPERATIONAL MODES RESET To reset an MCU, the 33911 drives the RST pin low for the time the reset condition lasts. After the reset source has been removed, the state machine will drive the RST output low ...

Page 27

RST Wake-up While in Stop Mode, the 33911 can wake-up when the RST pin is held low long enough to pass the internal glitch filter. Then, it will change to Normal Request or Normal Modes depending on the WDCONF pin ...

Page 28

FUNCTIONAL DEVICE OPERATIONS OPERATIONAL MODES Interrupt Control HVSE Module MOD1:2 HS1 Control HS1OP HS1CL Wakeup Module Open Load Detection The high side driver signals an open-load condition if the current through the high side is below the open-load current threshold. ...

Page 29

LOW SIDE OUTPUT PINS LS1 AND LS2 These outputs are two low side drivers intended to drive relays incorporating the following features: • PWM capability (software maskable) • Open load detection • Current limitation • Over-temperature shutdown (with maskable interrupt) ...

Page 30

FUNCTIONAL DEVICE OPERATIONS OPERATIONAL MODES LIN PHYSICAL LAYER The LIN bus pin provides a physical layer for single-wire communication in automotive applications. The LIN physical layer is designed to meet the LIN physical layer specification and has the following features: ...

Page 31

V ), the transmitter will not be shut down. The bit BAT LINOC in the LIN Status Register (LINSR) is set. If the LINM bit is set in the Interrupt Mask Register (IMR) an Interrupt IRQ will be ...

Page 32

FUNCTIONAL DEVICE OPERATIONS LOGIC COMMANDS AND REGISTERS 33911 SPI INTERFACE AND CONFIGURATION The serial peripheral interface creates the communication link between a microcontroller (master) and the 33911. The interface consists of four pins (see • — Chip Select CS • ...

Page 33

Table 6. System Status Register Adress(A3:A0) Register Name / Read / Write Information $ SYSSR - System Status Register Table 7 summarizes the SPI Register content for Control Information (C3:C0)=W and status information (S3:S0 Table 7. ...

Page 34

FUNCTIONAL DEVICE OPERATIONS LOGIC COMMANDS AND REGISTERS REGISTER DEFINITIONS System Status Register - SYSSR The System Status Register (SYSSR) is always transferred with every SPI transmission and gives a quick system status overview. It summarizes the status of the Voltage ...

Page 35

MOD2, MOD1 - Mode Control Bits These write-only bits select the operating mode and allow to clear the watchdog in accordance with Control Bits. Table 10. Mode Control Bits MOD2 MOD1 Description 0 0 Normal Mode 0 1 Stop Mode ...

Page 36

FUNCTIONAL DEVICE OPERATIONS LOGIC COMMANDS AND REGISTERS LIN Control Register - LINCR This register controls the LIN physical interface block. Writing the LIN Control Register (LINCR) returns the LIN Status Register (LINSR). Table 14. LIN Control Register - $4 C3 ...

Page 37

High Side Control Register - HSCR This register controls the operation of the high side driver. Writing to this register returns the High Side Status Register (HSSR). Table 17. High Side Control Register - $ Write 0 ...

Page 38

FUNCTIONAL DEVICE OPERATIONS LOGIC COMMANDS AND REGISTERS Timing Control Register - TIMCR This register is a double purpose register which allows to configure the watchdog and the cyclic sense periods. Writing to the Timing Control Register (TIMCR) will also return ...

Page 39

WDERR - Watchdog Error This read-only bit signals the detection of a missing watchdog resistor. In this condition the watchdog is using the internal, lower precision timebase. The Windowing function is disabled WDCONF pin resistor missing 0 = ...

Page 40

FUNCTIONAL DEVICE OPERATIONS LOGIC COMMANDS AND REGISTERS Interrupt Mask Register - IMR This register allow to mask some of interrupt sources. The respective flags within the Interrupt Source Register (ISR) will continue to work but will not generate interrupts to ...

Page 41

The 33911 can be configured in several applications. The figure below shows the 33911 in the typical Slave Node Application. VDD IRQ C4 C3 VDD RST IRQ RST PWMIN TIMER MISO MOSI SPI SCLK CS MCU ADOUT0 A/D RXD SCI ...

Page 42

PACKAGING PACKAGE DIMENSIONS Important For the most current revision of the package, visit Available Documentation column select Packaging Information. 33911 42 PACKAGING PACKAGE DIMENSIONS www.Freescale.com and select Documentation, then under AC SUFFIX (PB-FREE) 32-PIN LQFP 98ASH70029A REVISION D Analog Integrated ...

Page 43

Analog Integrated Circuit Device Data Freescale Semiconductor IMPORTANT FOR THE MOST CURRENT REVISION OF THE PACK- AGE, VISIT WWW.FREESCALE.COM AND SELECT DOCUMENTATION, AC SUFFIX (PB-FREE) 32-PIN LQFP 98ASH70029A REVISION D 33911 43 ...

Page 44

REVISION HISTORY PACKAGE DIMENSIONS Revision Date Description of Changes 9/2007 • Initial Release 3.0 • Changed Functional Block Diagram on page 22. 2/2008 4.0 • Corrected typo for Outline drawing number (98A...). 33911 44 REVISION HISTORY Analog Integrated Circuit Device ...

Page 45

... Freescale Semiconductor Literature Distribution Center P.O. Box 5405 Denver, Colorado 80217 1-800-441-2447 or 303-675-2140 Fax: 303-675-2150 LDCForFreescaleSemiconductor@hibbertgroup.com MC33911 Rev. 4.0 2/2008 Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document ...

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