m28w640fc Numonyx, m28w640fc Datasheet
m28w640fc
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m28w640fc Summary of contents
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... Program and Erase Suspend ■ 100,000 program/erase cycles per block ■ Electronic signature – Manufacturer code: 20h – Top device code, M28W640FCT: 8848h – Bottom device code, M28W640FCB: 8849h March 2008 M28W640FCT M28W640FCB 64 Mbit (4Mbx16, Boot Block) 3V Supply Flash memory ...
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... Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.3 Output Disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.4 Standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.5 Automatic Standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.6 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4 Command interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.1 Read Memory Array command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.2 Read Status Register command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.3 Read electronic signature command . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.4 Read CFI Query command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.5 Block Erase command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.6 Program command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.7 Double Word Program command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.8 Quadruple Word Program command . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2/77 M28W640FCT, M28W640FCB ...
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... M28W640FCT, M28W640FCB 4.9 Clear Status Register command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.10 Program/Erase Suspend command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.11 Program/Erase Resume command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.12 Protection Register Program command . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.13 Block Lock command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.14 Block Unlock command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.15 Block Lock-Down command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5 Block locking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.1 Reading a Block’s Lock status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.2 Locked state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.3 Unlocked state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.4 Lock-Down state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 5.5 Locking Operations during Erase Suspend . . . . . . . . . . . . . . . . . . . . . . . 28 6 Status Register ...
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... Contents Appendix C Flowcharts and pseudo codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Appendix D Command Interface and Program/Erase Controller State . . . . . . . 72 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 4/77 M28W640FCT, M28W640FCB ...
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... TFBGA48 6.39x10.5mm - 8x6 ball array, 0.75mm pitch, package mechanical data . . . . . 45 Table 22. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Table 23. Daisy Chain ordering scheme Table 24. Top Boot Block Addresses, M28W640FCT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Table 25. Bottom Boot Block Addresses, M28W640FCB Table 26. Query Structure Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Table 27. CFI Query Identification String . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Table 28. CFI Query System Interface Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Table 29. ...
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... Figure 19. Program Suspend & Resume flowchart and pseudo code . . . . . . . . . . . . . . . . . . . . . . . . . 67 Figure 20. Erase flowchart and pseudo code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 Figure 21. Erase Suspend & Resume flowchart and pseudo code . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 Figure 22. Locking Operations flowchart and pseudo code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Figure 23. Protection Register Program flowchart and pseudo code . . . . . . . . . . . . . . . . . . . . . . . . . 71 6/77 M28W640FCT, M28W640FCB ...
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... The devices feature an asymmetrical blocked architecture. They have an array of 135 blocks: 8 Parameter Blocks of 4 KWord and 127 Main Blocks of 32 KWord. The M28W640FCT has the Parameter Blocks at the top of the memory address space while the M28W640FCB locates the Parameter Blocks starting from the bottom. The memory maps ...
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... W E M28W640FCT M28W640FCB Address Inputs Data Input/Output Chip Enable Output Enable Write Enable Reset Write Protect Core Power supply Power supply for Input/Output Optional supply voltage for Fast Program & Erase Ground Not Connected Internally M28W640FCT, M28W640FCB 16 DQ0-DQ15 AI09903 ...
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... M28W640FCT, M28W640FCB Figure 2. TSOP connections A15 1 48 A14 A13 A12 A11 A10 A9 A8 A21 A20 M28W640FCT M28W640FCB A19 A18 A17 AI09904b Summary description A16 V DDQ V SS DQ15 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 ...
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... V DDQ 10/ A11 A10 W RP A18 A12 A9 A21 A20 DQ11 DQ2 DQ14 DQ5 DQ12 DQ15 DQ6 DQ3 DQ7 DQ13 DQ4 V DD M28W640FCT, M28W640FCB A19 A7 A4 A17 DQ8 E A0 DQ9 DQ0 V SSQ DQ10 DQ1 G AI04380b ...
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... M28W640FCT, M28W640FCB Figure 4. Block addresses M28W640FCT Top Boot Block Addresses 3FFFFF 4 KWords 3FF000 3F8FFF 4 KWords 3F8000 3F7FFF 32 KWords 3F0000 00FFFF 32 KWords 008000 007FFF 32 KWords 000000 1. Also see Appendix Figure 5. Protection Register memory map 8Ch 85h 84h 81h 80h Total KWord Blocks ...
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... Reset the memory is deselected, the outputs are high IH , the Lock-Down is enabled and the protection status of the block IL , the Lock-Down is disabled and the block IH Table 7: Read Protection Register and Lock M28W640FCT, M28W640FCB the device is in active IH Register). ...
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... M28W640FCT, M28W640FCB 2.7 Reset (RP) The Reset input provides a hardware reset of the memory. When Reset memory is in reset mode: the outputs are high impedance and the current consumption is minimized. After Reset all blocks are in the Locked state. When Reset normal operation. Exiting reset mode the device enters read array mode, but a negative transition of Chip Enable or a change of the address is required to ensure valid data outputs ...
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... The Chip Enable input IL Figure 8: Read AC . Commands, Input Data and Addresses are latched on the rising IH Figure 10, Write AC Waveforms, and during a program or erase operation, the device enters Standby IH M28W640FCT, M28W640FCB Table 2: Bus operations, waveforms, and Table 16: Read AC Table 17 and Table 18, Write AC ...
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... M28W640FCT, M28W640FCB 3.5 Automatic Standby Automatic Standby provides a low power consumption state during Read mode. Following a read operation, the device enters Automatic Standby after 150ns of bus inactivity even if Chip Enable is Low, V will still output data if a bus Read operation is in progress. 3.6 Reset During Reset mode when Output Enable is Low, V outputs are high impedance ...
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... Protection and Lock Register. See Tables 5, 16/77 Table 3: Command D, Table 32: Write State machine is lower than V . Command sequences must be followed DD LKO 6 M28W640FCT, M28W640FCB codes, for a summary of the commands Current/Next, for a summary of the Table 11: Status Register bits, for details and 7 for the valid address. ...
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... M28W640FCT, M28W640FCB Table 3. Command codes Hex Code 01h 10h 20h 2Fh 30h 40h 50h 56h 60h 70h 90h 98h B0h C0h D0h FFh 4.4 Read CFI Query command The Read Query Command is used to read data from the Common Flash Interface (CFI) Memory Area, allowing programming equipment or applications to automatically match their interface to the characteristics of the device ...
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... As data integrity cannot be guaranteed when the Erase IL Table 8: Program, Erase Times and Program/Erase endurance Figure 20: Erase flowchart and pseudo . As data integrity cannot be guaranteed when the IL Figure 16: Program flowchart and pseudo M28W640FCT, M28W640FCB cycles. code, for a suggested flowchart for Table 8: cycles. code, for the flowchart for using ...
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... M28W640FCT, M28W640FCB 4.7 Double Word Program command This feature is offered to improve the programming throughput, writing a page of two adjacent words in parallel.The two words must differ only for the address A0. Programming should not be attempted when V Three bus write cycles are necessary to issue the Double Word Program command. ...
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... Program/Erase is aborted if Reset turns Figure 19: Program Suspend & Resume flowchart and pseudo Figure 19: Program Suspend & Resume flowchart and pseudo map). Attempting to program a previously protected M28W640FCT, M28W640FCB . IL code, and code, for flowcharts for using code, and code, for flowcharts for using ...
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... M28W640FCT, M28W640FCB 4.13 Block Lock command The Block Lock command is used to lock a block and prevent Program or Erase operations from changing the data in it. All blocks are locked at power-up or reset. Two Bus Write cycles are required to issue the Block Lock command. ● The first bus cycle sets up the Block Lock command. ...
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... Lock-Down command. Refer to the section, Block Locking, for a detailed explanation. 22/77 shows the protection status after issuing a Block Unlock command. . When WP is high, V the Lock-Down function is disabled and the IL IH, Table 10 shows the protection status after issuing a Block M28W640FCT, M28W640FCB ...
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... M28W640FCT, M28W640FCB (1) Table 4. Commands Commands 1st Cycle Op. Add Data Read Memory 1+ Write X Array Read Status 1+ Write X Register Read Electronic 1+ Write X Signature Read CFI 1+ Write X Query Erase 2 Write X Program 2 Write X Double Word 3 Write X (3) Program Quadruple Word 5 Write X (4) Program Clear Status ...
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... Care Don Care Don Care M28W640FCT, M28W640FCB A2-A7 A8-A21 DQ0-DQ7 0 Don't Care 20h 0 Don't Care 48h 0 Don't Care 49h A12-A21 DQ0 DQ1 Block 1 0 Address Block 0 0 Address Block ( Address DQ8- ...
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... M28W640FCT, M28W640FCB Table 7. Read Protection Register and Lock Register Word E G Lock Unique Unique Unique Unique OTP OTP OTP OTP OTP OTP 5 ...
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... 12V ± 12V ± 12V ± 12V ± 100,000 M28W640FCT, M28W640FCB Unit Typ Max 10 200 µs 10 200 µs 10 200 µs (1) 0.16/0. 0. (1) 0.02/0. 0. ...
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... M28W640FCT, M28W640FCB 5 Block locking The M28W640FCT and M28W640FCB feature an instant, individual block locking scheme that allows any block to be locked or unlocked with no latency. This locking scheme has three levels of protection. ● Lock/Unlock - this first level allows software-only control of block locking. ● ...
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... Command Interface and Program/Erase Controller State, for detailed information on which commands are valid during erase suspend. Table 9. Block Lock status Block Lock Configuration Block is Unlocked Block is Locked-Down 28/77 ) the Lock-Down function is disabled (1,1,1) and Locked-Down IH Item Block is Locked M28W640FCT, M28W640FCB ), the blocks in IL Appendix Address Data LOCK DQ0=0 xx002 DQ0=1 DQ1=1 D, ...
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... M28W640FCT, M28W640FCB Table 10. Protection status Current Protection Status (WP, DQ1, DQ0) Program/Erase Current State 1,0,0 (2) 1,0,1 1,1,0 1,1,1 0,0,0 (2) 0,0,1 0,1,1 1. The lock status is defined by the write protect pin and by DQ1 (‘1’ for a locked-down block) and DQ0 (‘1’ for a locked block) as read in the Read Electronic Signature command with ...
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... Program/Erase Suspend command being issued therefore the memory may still complete the operation rather than entering the Suspend mode. When a Program/Erase Resume command is issued the Erase Suspend Status bit returns Low. 30/77 . Either Chip Enable or Output Enable must be toggled to IH Table 11: Status Register M28W640FCT, M28W640FCB bits. Refer to ...
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... M28W640FCT, M28W640FCB 6.3 Erase status (bit 5) The Erase Status bit can be used to identify if the memory has failed to verify that the block has erased correctly. When the Erase Status bit is High (set to ‘1’), the Program/Erase Controller has applied the maximum number of pulses to the block and still failed to verify that the block has erased correctly ...
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... Program Status Program Suspend Status 1 Block Protection Status 0 Reserved 1. Logic level '1' is High, '0' is Low. 32/77 codes, for using the Status Register. (1) Name Logic Level Status M28W640FCT, M28W640FCB Definition '1' Ready '0' Busy '1' Suspended '0' In progress or Completed '1' Erase Error '0' Erase Success '1' Program Error '0' ...
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... M28W640FCT, M28W640FCB 7 Maximum rating Stressing the device above the rating listed in the Absolute Maximum Ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied ...
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... Designers should check that the M28W640FCT, M28W640FCB 70 85 Min Max Min 2.7 3.6 2.7 2.7 3.6 2.7 –40 85 – DDQ DDQ DDQ DDQ V DDQ 0V M28W640FCT, M28W640FCB 90 10 Max Min Max Min Max 3.6 2.7 3.6 2.7 3.6 3.6 2.7 3.6 1.65 3.6 85 –40 85 – DDQ DDQ /2 ...
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... M28W640FCT, M28W640FCB Figure 7. AC measurement load circuit Table 14. Capacitance Symbol C Input capacitance IN C Output capacitance OUT 1. Sampled only, not 100% tested. V DDQ V DD DEVICE UNDER TEST 0.1µF 0.1µ includes JIG capacitance (1) Parameter Test Condition OUT DC and AC parameters V DDQ ...
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... PP Erase in progress DDQ V DDQ I = 100µ DDQ DDQ I = –100µ DDQ DDQ M28W640FCT, M28W640FCB Min Typ V DDQ V DDQ , IH 9 ± 0.2V, 15 ± 0.2V ± 0. ± 0.2V ± 0. ...
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... M28W640FCT, M28W640FCB Table 15. DC characteristics (continued) Symbol Program voltage (Program or V PP1 Erase operations) Program voltage (Program or V PPH Erase operations) Program voltage (Program V PPLK and Erase lock-out) V supply voltage (Program DD V LKO and Erase lock-out) Parameter Test condition DC and AC parameters ...
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... OUTPUTS ADDR. VALID ENABLED CHIP ENABLE Parameter - t after the falling edge of E without increasing t ELQV GLQV M28W640FCT, M28W640FCB tEHQX tEHQZ tGHQX tGHQZ VALID DATA VALID STANDBY M28W640FCT, M28W640FCB Min Max Min Min Max ...
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... M28W640FCT, M28W640FCB Figure 9. Write AC waveforms, Write enable controlled DC and AC parameters 39/77 ...
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... Write Enable High to Chip Enable Low Write Enable High to Output Enable Low Write Enable High to Write Enable Low Write Enable Low to Write Enable High Write Protect High to Write Enable High is seen as a logic input (V < 3.6V). PP M28W640FCT, M28W640FCB M28W640FCT, M28W640FCB Min 100 Min ...
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... M28W640FCT, M28W640FCB Figure 10. Write AC waveforms, Chip enable controlled DC and AC parameters 41/77 ...
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... Output Valid to V Low PP Data Valid to Write Protect Low V High to Chip Enable High PP Write Enable Low to Chip Enable Low Write Protect High to Chip Enable High is seen as a logic input (V < 3.6V). PP M28W640FCT, M28W640FCB M28W640FCT, M28W640FCB Min 100 Min Min 45 ...
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... M28W640FCT, M28W640FCB Figure 11. Power-Up and Reset AC waveforms VDD, VDDQ Table 19. Power-Up and Reset AC characteristics Symbol t Reset High to Write Enable Low, PHWL t Chip Enable Low, Output Enable PHEL t Low PHGL (1)(2) t Reset Low to Reset High PLPH Supply Voltages High to Reset (3) t VDHPH High 1 ...
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... M28W640FCT, M28W640FCB TSOP-G inches Typ Min 0.0039 0.0020 0.0394 0.0374 0.0087 0.0067 0.0039 0.4724 0.4685 ...
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... M28W640FCT, M28W640FCB Figure 13. TFBGA48 6.39x10.5mm - 8x6 ball array, 0.75mm pitch, bottom view package outline E BALL "A1" 1. Drawing is not to scale. Table 21. TFBGA48 6.39x10.5mm - 8x6 ball array, 0.75mm pitch, package mechanical data Symbol ddd E 10.500 ...
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... Package mechanical Figure 14. TFBGA48 daisy chain - package connections (top view through package 46/ M28W640FCT, M28W640FCB AI04390 ...
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... M28W640FCT, M28W640FCB Figure 15. TFBGA48 daisy chain - PCB connections proposal (top view through package Package mechanical START POINT END POINT AI04391 47/77 ...
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... B = Bottom Boot Speed 70 = 70ns 85 = 85ns 90 = 90ns 10 = 100ns Package N = TSOP48 TFBGA48: 6.39 x 10.5mm, 0.75 mm pitch Temperature range ° – °C Option E = ECOPACK® Package, Standard Packing F = ECOPACK® Package, Tape & Reel Packing 48/77 M28W640FCT 1.65V to 3.6V DDQ M28W640FCT, M28W640FCB 6 E ...
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... M28W640FCT, M28W640FCB Table 23. Daisy Chain ordering scheme Example: Device type M28W640FC Daisy chain -ZB = TFBGA48: 6.39 x 10.5mm, 0.75 mm pitch Option E = ECOPACK® Package, Standard Packing F = ECOPACK® Package, Tape & Reel Packing, 24mm 1. Devices are shipped from the factory with the memory content bits erased to ’1’. For a list of available options (Speed, Package, etc ...
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... Block address tables Appendix A Block address tables Table 24. Top Boot Block Addresses, M28W640FCT # 50/77 Size (KWord ...
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... M28W640FCT, M28W640FCB Table 24. Top Boot Block Addresses, M28W640FCT (continued Size (KWord ...
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... Block address tables Table 24. Top Boot Block Addresses, M28W640FCT (continued 100 101 52/77 Size (KWord ...
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... M28W640FCT, M28W640FCB Table 24. Top Boot Block Addresses, M28W640FCT (continued) # 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 ...
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... Block address tables Table 25. Bottom Boot Block Addresses, M28W640FCB # 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 ...
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... M28W640FCT, M28W640FCB Table 25. Bottom Boot Block Addresses, M28W640FCB (continued Size (KWord ...
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... Block address tables Table 25. Bottom Boot Block Addresses, M28W640FCB (continued 56/77 Size (KWord ...
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... M28W640FCT, M28W640FCB Table 25. Bottom Boot Block Addresses, M28W640FCB (continued Size (KWord Block address tables ...
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... Alternate Algorithm-specific Extended A Query table 1. Query data are always presented on the lowest order data outputs. 58/77 area). This area can be accessed only in Read mode (1) Sub-section Name M28W640FCT, M28W640FCB 30 and 31 show the Description Reserved for algorithm-specific information Command set ID and algorithm data offset Device timing & ...
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... M28W640FCT, M28W640FCB Table 27. CFI Query Identification String Offset Data 00h 0020h 8848h 01h 8849h 02h-0Fh reserved Reserved 10h 0051h 11h 0052h 12h 0059h 13h 0003h 14h 0000h 15h 0035h 16h 0000h 17h 0000h 18h 0000h 19h 0000h 1Ah 0000h 1. Query data are always presented on the lowest order data outputs (DQ7-DQ0) only. DQ8-DQ15 are ‘0’. ...
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... Typical time-out for Double/Quadruple Word Program = 2 Typical time-out per individual block erase = 2 Typical time-out for full chip erase = 2 Maximum time-out for Word program = 2 Maximum time-out for Double/Quadruple Word Program = 2 typical Maximum time-out per individual block erase = 2 Maximum time-out for chip erase = 2 M28W640FCT, M28W640FCB n µs n µ ...
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... M28W640FCT, M28W640FCB Table 29. Device Geometry Definition Offset Word Data Mode 27h 0017h 28h 0001h 29h 0000h 2Ah 0003h 2Bh 0000h 2Ch 0002h 2Dh 007Eh 2Eh 0000h 2Fh 0000h 30h 0001h 31h 0007h 32h 0000h 33h 0020h 34h 0000h 2Dh 0007h 2Eh ...
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... Supply Optimum Program/Erase voltage PP bit 7 to 4HEX value in volts bit 3 to 0BCD value in 100 mV Number of Protection register fields in JEDEC ID space. "00h," indicates that 256 protection bytes are available M28W640FCT, M28W640FCB Value "P" "R" "I" "1" "0" ...
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... M28W640FCT, M28W640FCB Table 30. Primary Algorithm-specific Extended Query table (continued) Offset Data ( 35h (P+F)h = 44h 0080h (P+10)h = 0000h 45h (P+11)h = 0003h 46h (P+12)h = 0004h 47h (P+13)h = 48h 1. See Table 27, offset 15 for P pointer definition Table 31. Security code area Offset Data 80h 00XX 81h XXXX 82h XXXX 83h ...
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... must be toggled*/ } while (status_register.b7 Invalid if (status_register.b3==1) /*VPP invalid error */ Error (1, 2) error_handler ( ) ; Program if (status_register.b4==1) /*program error */ Error (1, 2) error_handler ( ) ; if (status_register.b1==1) /*program to protect block error */ Block Error (1, 2) error_handler ( ) ; } Invalid) and b4 (Program Error) can be made after each program operation PP M28W640FCT, M28W640FCB AI03538b ...
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... M28W640FCT, M28W640FCB Figure 17. Double Word Program flowchart and pseudo code Start Write 30h Write Address 1 & Data 1 (3) Write Address 2 & Data 2 (3) Read Status Register YES YES YES NO Program to Protected Block Error (1, 2) YES End 1. Status check of b1 (Protected Block after a sequence ...
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... Program error_handler ( ) ; Error ( (status_register.b1==1) /*program to protect block error */ error_handler ( ) ; } Invalid) and b4 (Program Error) can be made after each program operation PP M28W640FCT, M28W640FCB addressToProgram2, dataToProgram2, addressToProgram3, dataToProgram3, addressToProgram4, dataToProgram4) /*see note (3) */ /*see note (3) */ /*see note (3) */ /*see note (3) */ AI06233 ...
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... M28W640FCT, M28W640FCB Figure 19. Program Suspend & Resume flowchart and pseudo code Start Write B0h Write 70h Read Status Register YES YES Write FFh Read data from another address Write D0h Program Continues program_suspend_command ( ) { Program Complete if (status_register.b2==0) /*program completed */ ...
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... must be toggled*/ } while (status_register.b7 Invalid if (status_register.b3==1) /*VPP invalid error */ Error (1) error_handler ( ) ; if ( (status_register.b4==1) && (status_register.b5==1) ) Command /* command sequence error */ Sequence Error (1) error_handler ( ) ; if ( (status_register.b5== erase error */ Erase Error (1) error_handler ( ) ; Erase to Protected if (status_register.b1==1) /*program to protect block error */ Block Error (1) error_handler ( ) ; } M28W640FCT, M28W640FCB AI03541b ...
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... M28W640FCT, M28W640FCB Figure 21. Erase Suspend & Resume flowchart and pseudo code Start Write B0h Write 70h Read Status Register YES YES Write FFh Read data from another block or Program/Protection Program or Block Protect/Unprotect/Lock Write D0h Erase Continues erase_suspend_command ( ) { (status_register.b6==0) /*erase completed */ ...
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... NO error_handler () ; /*Check the locking state (see Read Block Signature table )*/ writeToFlash (any_address, 0xFF) ; /*Reset to Read Array mode*/ } M28W640FCT, M28W640FCB AI04364 ...
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... M28W640FCT, M28W640FCB Figure 23. Protection Register Program flowchart and pseudo code Start Write C0h Write Address & Data Read Status Register YES YES YES NO Program to Protected YES End 1. Status check of b1 (Protected Block after a sequence error is found, the Status Register must be cleared before further Program/Erase Controller operations. ...
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... Program (continue) Sus Program Suspend to Program Read Array (continue) Sus Program Suspend to Program Read Array (continue) Sus Program Suspend to Program Read Array (continue) M28W640FCT, M28W640FCB Prog/Ers Prog/Ers Read Suspend Resume Status (B0h) (D0h) (70h) Read Read Array Sts. Read Read Array Status ...
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... M28W640FCT, M28W640FCB Table 32. Write State machine Current/Next SR Current Data When Read bit State Read Array 7 (FFh) Prog. Prog. Sus “1” CFI Read CFI Read Array Program Read “1” Status (complete) Array Erase “1” Status Setup Erase Read “1” ...
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... Program Suspend Read Array Read CFI Query Prog. Suspend Program Suspend Read Array Read CFI Query Prog. Suspend Program Suspend Read Array Read CFI Query M28W640FCT, M28W640FCB Lock Unlock Lock Down Confirm Confirm Confirm (01h) (D0h) (2Fh) Read Array Read Array ...
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... M28W640FCT, M28W640FCB Table 33. Write State machine Current/Next Current Read State Elect.Sg. (90h) Program Read (complete) Elect.Sg. Erase Setup Erase Read Cmd.Error Elect.Sg. Erase (continue) Erase Erase Suspend Suspend Read Read Elect.Sg. Ststus Erase Erase Suspend Suspend Read Read Array Elect.Sg. Erase ...
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... Blank and T options removed from below Table 23. Packages are ECOPACK® compliant. The 0.13µm technology was removed from the device options of 3 Table 22: Ordering information 4 Applied Numonyx branding. M28W640FCT, M28W640FCB Revision details and Figure 3: TFBGA connections (top Table 20: TSOP48 - 48 characteristics. Option in Table 22 scheme ...
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... M28W640FCT, M28W640FCB INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH NUMONYX™ PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN NUMONYX'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, NUMONYX ASSUMES NO LIABILITY WHATSOEVER, AND NUMONYX DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF NUMONYX PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT ...