LTC1428-50 Linear Technology, LTC1428-50 Datasheet

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LTC1428-50

Manufacturer Part Number
LTC1428-50
Description
Micropower 8-Bit Current Sink Output D/A Converter
Manufacturer
Linear Technology
Datasheet
FEATURES
APPLICATIONS
TYPICAL
Precision Full-Scale DAC Output Current
at 25 C: 50 A 3%
Wide Output Voltage DC Compliance: 2V to 10V
Wide Supply Range: 3V V
Supply Current in Shutdown: 0.2 A
Low Supply Current: 130 A
Available in 8-Pin SO
Triple Mode
1. Standard 3-Wire Mode
2. 1-Wire Pulse Mode Interface: Increment-Only
3. 2-Wire Pulse Mode Interface: Increment/Decrement
DAC Value Read Back Capability in 3-Wire Mode
DAC Powers Up at Midrange
DAC Contents Are Retained in Shutdown
LCD Contrast Control
Backlight Brightness Control
Power Supply Voltage Adjustment
Battery Charger Voltage/Current Adjustment
GaAs FET Bias Adjustment
Trimmer Pot Elimination
L1: 4.7 H MURATA-ERIE LQH3C
D1: MBR0530 OR 1N4148
CELLS
2
APPLICATION
TM
Interface
U
1 F
SHDN
CC
Digitally Controlled LCD Bias Generator (Standard 3-Wire Mode)
SHDN
GND
U
LT
6.5V
®
V
1307
IN
V
C
SW
L1
FB
100k
4700pF
D1
R1
240k
R2
22k
R3
22k
Sink Output D/A Converter
DESCRIPTION
The LTC
output D/A converter (DAC) with an output range of 0 A to
50 A. In 3.3V or 5V systems, the DAC I
biased from 2V to 10V. Supply current is only 130 A.
Shutdown mode drops the supply current to 0.2 A.
The LTC1428-50 communicates with external circuitry by
using one of three interface modes: standard 3-wire serial
mode or one of two pulse modes. Upon power-up, the
internal counter resets to 10000000B, the DAC output
assumes midrange and the chip configures to 3-wire or
pulse mode depending on the CS signal level.
In 3-wire mode, the system MPU can serially transfer
8-bit data to and from the LTC1428-50. In pulse mode, the
upper six bits of the DAC output program for increment-
only (1-wire interface) or increment/decrement (2-wire
interface) operation depending on the D
increment-only mode, the counter rolls over and sets the
DAC to zero if the counter increases beyond full scale. In
increment/decrement mode, the counter stops
incrementing at full scale, stops decrementing at zero
scale and does not roll over.
LTC1428-50 is available in an 8-pin SO package.
Triple Mode is a trademark of Linear Technology Corporation.
, LTC and LT are registered trademarks of Linear Technology Corporation.
C1
0.1 F
Micropower 8-Bit Current
V
15.75V TO 27.75V IN STEPS OF 47mV
15mA FROM 2 CELLS
OUT
®
1
2
3
4
1428-50 is a micropower 8-bit current sink
I
V
SHDN
CLK
OUT
CC
LTC1428-50
D
GND
U
OUT
D
CS
IN
6
5
8
7
1428-50 TA01
V
P1.3
P1.2
P1.1
P1.0
LTC1428-50
5V
CC
(e.g., 8051)
MPU
IN
OUT
signal level. In
pin can be
1

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LTC1428-50 Summary of contents

Page 1

... CS signal level. In 3-wire mode, the system MPU can serially transfer 8-bit data to and from the LTC1428-50. In pulse mode, the upper six bits of the DAC output program for increment- only (1-wire interface) or increment/decrement (2-wire ...

Page 2

... LTC1428- ABSOLUTE MAXIMUM (Note 1) Supply Voltage (V ) ................................................ 7V CC Input Voltage (All Inputs)............ – 0. Output Voltage I ...................................................... – 0.3V to 10V OUT D ....................................... – 0. OUT Short-Circuit Duration (All Outputs) ............... Indefinite Operating Temperature Range .................... Storage Temperature Range ................. – 150 C Lead Temperature (Soldering, 10 sec).................. 300 C ...

Page 3

... Note 4: This is the minimum time required for valid data transfer. INL vs Code 1 3.3V CC 0.8 V 2.5V OUT 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1 128 160 192 224 256 CODE 1428-50 G02 LTC1428-50 MIN TYP MAX UNITS 2 MHz 150 ns 400 ns 150 ns 150 ns 150 ns 150 ns 200 ns 250 ns 150 ns 400 ns 400 ns 4550 ...

Page 4

... The digital setting for the DAC is retained. CLK (Pin 4): Shift Clock. This clock synchronizes the serial data and has a Schmitt trigger input. CS (Pin 5): Chip Select Input. In 3-wire mode, a logic low enables the LTC1428-50. Upon power-up, a logic high 4 Bias Voltage Rejection 2 0. ...

Page 5

... WAVEFORM 2 (SEE NOTE 2) NOTE 1: WAVEFORM 1 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH THAT THE OUTPUT IS HIGH UNLESS DISABLED BY CS NOTE 2: WAVEFORM 2 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH THAT THE OUTPUT IS LOW UNLESS DISABLED BY CS LTC1428-50 8-BIT CURRENT I OUT DAC ...

Page 6

... CS and UP/DN will always remain high. 2-wire pulse mode systems must provide a single logic low pulse before the first data pulses are sent to prevent the LTC1428-50 from remaining in 1-wire mode if the first several pulses are logic high. Standard 3-Wire Mode (Figure 3) Refer to the Serial Interface Operating Sequence in Figure 1 ...

Page 7

... The last two LSBs are always zero in pulse mode ( 0)I OUT To configure the LTC1428-50 in 2-wire pulse mode, tie and bring the UP/DN pin low at least once during CC power-up. 8 ...

Page 8

... BAT 7.5V V 24V BAT + IN STEPS OF 65mV + OUT OUT LTC1428- (e.g., 8051) SHDN GND 5 4 CLK CS P1.2 P1.1 P1.0 1428-50 TA03 0.189 – 0.197* (4.801 – 5.004 0.150 – 0.157** 0.228 – 0.244 (3.810 – 3.988) SO8 0996 ...

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