LTC1402 Linear Technology, LTC1402 Datasheet

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LTC1402

Manufacturer Part Number
LTC1402
Description
Serial 12-Bit/ 2.2Msps Sampling ADC with Shutdown
Manufacturer
Linear Technology
Datasheet

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APPLICATIONS
BLOCK DIAGRA
FEATURES
MICROWIRE is a trademark of National Semiconductor Corp.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Sample Rate: 2.2Msps
72dB S/(N + D) and –89dB THD at Nyquist
No Missing Codes over Temperature
Available in 16-Pin Narrow SSOP Package
Single Supply 5V or 5V Operation
Power Dissipation: 90mW (Typ)
Nap Mode with Instant Wake-Up: 15mW
Sleep Mode: 10 W
True Differential Inputs Reject Common Mode Noise
80MHz Full Power Bandwidth Sampling
Input Range (1mV/LSB): 0V to 4.096V or 2.048V
Internal Reference Can Be Overdriven Externally
3-Wire Interface to DSPs and Processors (SPI and
MICROWIRE
Telecommunications
High Speed Data and Signal Acquisition
Digitally Multiplexed Data Acquisition Systems
Digital Radio Receivers
Spectrum Analysis
Low Power and Battery-Operated Systems
Handheld or Portable Instruments
Imaging Systems
+A
V
–A
REF
IN
IN
10 F
10 F
GAIN
3
4
5
7
TM
LTC1402
Compatible)
U
AND-HOLD
SAMPLE-
10 F
64k
64k
–5V OR 0V
14
4.096V
V
W
SS
+
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
2
AGND1
REFERENCE
12-BIT ADC
2.048
1
6
AV
AGND2
DD
12
13
5V
DV
DGND
TIMING
LOGIC
DD
3V OR 5V
OUTPUT
BUFFER
11
9
Sampling ADC with Shutdown
OGND
OV
DD
1402 TA01
10
8
16
15
DESCRIPTION
The LTC
verter. This high performance device includes a high dy-
namic range sample-and-hold and a precision reference.
It operates from a single 5V supply or dual 5V supplies
and draws only 90mW from 5V.
The versatile differential input offers a unipolar range of
4.096V and a bipolar range of 2.048V for dual supply
systems where high performance op amps perform best,
eliminating the need for special translation circuitry.
The high common mode rejection allows users to elimi-
nate ground loops and common mode noise by measuring
signals differentially from the source.
Outstanding AC performance includes 72dB S/(N + D) and
–93dB SFDR at the Nyquist input frequency of 1.1MHz
with dual 5V supplies and –84dB SFDR with a single 5V
supply.
The LTC1402 has two power saving modes: Nap and
Sleep. Nap mode consumes only 15mW of power and
Sleep can wake up and convert immediately. In Sleep
mode, it typically consumes 10 W of power. Upon power-
up from Sleep mode, a reference ready (REFRDY) signal
is available in the serial data word to indicate that the
reference has settled and the chip is ready to convert.
The 3-wire serial port allows compact and efficient data
transfer to a wide range of microprocessors, microcon-
trollers and DSPs. A digital output driver power supply pin
allows direct connection to 3V or lower logic.
D
BIP/UNI
CONV
SCK
OUT
®
1402 is a 12-bit, 2.2Msps sampling A/D con-
Serial 12-Bit, 2.2Msps
5 Harmonic THD, 2nd, 3rd and SFDR
–100
–110
–120
–10
–20
–30
–40
–50
–60
–70
–80
–90
U
0
vs Input Frequency (Unipolar)
10
4
f
SAMPLE
Final Electrical Specifications
THD
SFDR
2ND
3RD
= 2.22MHz
INPUT FREQUENCY (Hz)
10
5
10
October 1999
6
LTC1402
1401 G05
10
7
1

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LTC1402 Summary of contents

Page 1

... SFDR at the Nyquist input frequency of 1.1MHz with dual 5V supplies and –84dB SFDR with a single 5V supply. The LTC1402 has two power saving modes: Nap and Sleep. Nap mode consumes only 15mW of power and Sleep can wake up and convert immediately. In Sleep mode, it typically consumes power. Upon power- ...

Page 2

... SS Digital Output Voltage ......... (V – 0.3V Power Dissipation .............................................. 250mW Operation Temperature Range LTC1402C ............................................... LTC1402I ............................................ – Storage Temperature Range ................. – 150 C Lead Temperature (Soldering, 10 sec).................. 300 C U CONVERTER CHARACTERISTICS temperature range, otherwise specifications are at T PARAMETER Resolution (No Missing Codes) ...

Page 3

... A DD OUT V = 4.75V 1.6mA DD OUT OUT 0V OUT 0V OUT OUT DD LTC1402 MIN TYP MAX 72.5 69 72.0 –89 –89 –74.5 –87 –82 –93 –84 –84 –84 0.18 82 5.0 3.5 denotes the specifications which apply over the MIN TYP MAX 4.096 15 1 ...

Page 4

... LTC1402 W U POWER REQUIRE E TS range, otherwise specifications are SYMBOL PARAMETER V Positive Supply Voltage DD V Negative Supply Voltage SS I Positive Supply Current DD I Negative Supply Current SS PD Power Dissipation CHARACTERISTICS range, otherwise specifications are SYMBOL PARAMETER f Maximum Sampling Frequency (Conversion Rate) ...

Page 5

... INPUT FREQUENCY (Hz) LTC1402 sequence. The OUT has stopped slewing in REF . REF input sine wave. P-P (Bipolar Mode Plots Run with Dual 5V Supplies for Unipolar SNR vs Input Frequency (Bipolar) – ...

Page 6

... LTC1402 W U TYPICAL PERFOR A CE CHARACTERISTICS Unipolar Mode Plots Run with a Single 5V Supply. V Sine Wave Spectrum Plot (Bipolar) 5V Supply 2222222.22Hz SAMPLE 109592.01Hz SINE –10 2048 SAMPLES –20 –30 –40 –50 –60 4TH –70 2ND 5TH –80 3RD 6TH –90 – ...

Page 7

... F ceramic ( tantalum in parallel with 0.1 F ceramic). AGND1 (Pin 2): Analog Ground. Tie to solid analog ground plane. The analog ground plane should be solid and have no cuts near the LTC1402 (Pin 3): Positive Analog Signal Input 4.096V in IN unipolar mode and 2 ...

Page 8

... LTC1402 PIN FUNCTIONS GAIN (Pin 7): Tie to AGND2 to set the reference voltage to 4.096V or tie set the reference voltage to 2.048V. REF (Note 4) BIP/UNI (Pin 8): Tie to logic low to set the input range to unipolar mode or tie to logic high to set the input range to bipolar mode. (Note 4) OGND (Pin 9): Output Ground for the Output Driver ...

Page 9

... REFRDY BIT + 12-BIT DATA WORD t CONV t THROUGHPUT Nap Mode and Sleep Mode Waveforms t 1 SCK to D Delay OUT SCK OUT V OL LTC1402 ACQ SAMPLE WORD ...

Page 10

... IN increasing the time between conversions. The best choice for an op amp to drive the LTC1402 will depend on the application. Generally, applications fall into two catego- ries: AC applications where dynamic specifications are most critical, and time domain applications where DC accuracy and settling time are most critical. The following list is a summary of the op amps that are suitable for driving the LTC1402 ...

Page 11

... Figure 3. 1MHz Fifth Order Elliptic Lowpass Filter BIPOLAR AND UNIPOLAR INPUT RANGES The 2V bipolar input range of the LTC1402 is optimized for low noise and low distortion. Most op amps also perform best over this same range, allowing direct cou- pling to the analog inputs and eliminating the need for special translation circuitry ...

Page 12

... U ADC can then be adjusted to match the peak input signal, maximizing the signal-to-noise ratio. The filtering of the internal LTC1402 reference amplifier will limit the band- width and settling time of this circuit. A settling time of 5ms should be allowed after a reference adjustment. DIFFERENTIAL INPUTS The LTC1402 has a unique differential sample-and-hold circuit that allows inputs from – ...

Page 13

... FREQUENCY (MHz) Figure 7. CMRR vs Input Frequency FULL-SCALE AND OFFSET ADJUSTMENT Figure 8 shows the ideal input/output characteristics for the LTC1402 in bipolar mode and unipolar mode. Figure 9a shows the components required for full-scale error ad- justment. Figure 9b includes the components for offset and full-scale adjustment. ...

Page 14

... POWER-DOWN MODES bypass capacitor and Upon power-up, the LTC1402 is initialized to the active state and is ready for conversion. The Nap and Sleep Mode waveforms show the power-down modes for the LTC1402. LTC1402 AGND2 ...

Page 15

... A simple approach to generate CONV is to create a pulse that is one SCK wide to drive the LTC1402 and then buffer this signal with the appropriate number of inverters to drive the frame sync input of the processor serial port good practice ...

Page 16

... DSP port, this signal will have the same jitter of the DSP’s master clock. SERIAL TO PARALLEL CONVERSION You can take advantage of the serial interface of the LTC1402 in a parallel data system to minimize bus wiring conges- tion in the PC board layout. Figure 12 shows an example of this interface ...

Page 17

... SCK 10 D OUT 9 OGND ; *************************************************************************** ; Files: BSP2KB.ASM -> ; 2kbyte collection into DSKPlus TMS320C542 with Serial Port interface to LTC1402 ; first element at 1024, last element at 1023, two middle elements at 2047 and 0000 ; bipolar mode ; *************************************************************************** .width 160 .length 110 .title “sineb0 BSP in auto buffer mode” ...

Page 18

... LTC1402 U U APPLICATIONS INFORMATION ; ————————Buffered Receive Interrupt Routine ————————— breceive: ifr = #10h ; clear interrupt flags TC = bitf(@BSPCE,#4000h) ; check which half (bspce(bit14)) of buffer if (NTC) goto bufull ...

Page 19

... DO NOT MODIFY IF USING DEBUGGER * nop nop .space 52*16 ;0C-3F: vectors for software interrupts 18-30 int0 return_enable ;40; external interrupt int0 nop nop nop int1 return_enable ;44; external interrupt int1 nop nop nop int2 return_enable ;48; external interrupt int2 nop nop nop W U LTC1402 19 ...

Page 20

... LTC1402 U U APPLICATIONS INFORMATION tint return_enable ;4C; internal timer interrupt nop nop nop brint goto breceive ;50; BSP receive interrupt nop nop nop bxint goto bsend ;54; BSP transmit interrupt nop nop nop trint return_enable ;58; TDM receive interrupt nop nop nop PACKAGE DESCRIPTION 0.015 0.004 (0.38 0.10) 0.007 – ...

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