LTC1400 LINER [Linear Technology], LTC1400 Datasheet
LTC1400
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LTC1400 Summary of contents
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... This easy-to-use device comes complete with a 200ns sample-and-hold and a precision reference. Unipolar and bipolar conversion modes add to the flexibility of the ADC. The LTC1400 has two power saving modes: Nap and Sleep. In Nap mode, it consumes only 6mW of power and can wake up and convert immediately. In the Sleep mode, it consumes power typically ...
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... Digital Output Voltage Unipolar Operation .................. – 0. Bipolar Operation........... (V – 0.3V Power Dissipation.............................................. 500mW Operation Temperature Range LTC1400C................................................ LTC1400I............................................ – Storage Temperature Range ................. – 150 C Lead Temperature (Soldering, 10 sec).................. 300 POWER REQUIRE E TS SYMBOL PARAMETER V ...
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... 4.75V 4.75V – 4.75V – 200 4.75V 160 4.75V 1.6mA CC O LTC1400 MIN TYP MAX UNITS 12 Bits 1 LSB 1 LSB 6 LSB 8 LSB 15 LSB 10 45 ppm/ C MIN TYP MAX UNITS ...
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... LTC1400 U U DIGITAL I PUTS AND OUTPUTS SYMBOL PARAMETER I Hi-Z Output Leakage D OZ OUT C Hi-Z Output Capacitance D (Note 7) OZ OUT I Output Source Current SOURCE I Output Sink Current SINK CHARACTERISTICS SYMBOL PARAMETER f Maximum Sampling Frequency SAMPLE(MAX) t Conversion Time CONV t Acquisition Time (Unipolar Mode) ...
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... 4000 3500 3000 2500 2000 1500 1000 500 0 1000 10 100 1000 SOURCE Supply Current vs Temperature 20 f SAMPLE –50 – TEMPERATURE ( C) 1000 LTC1400 • TPC06 10000 LTC1400 • TPC05 = 400kHz 75 100 125 LTC1400 • TPC04 5 ...
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... GND for unipolar operation SAMPLE 2.42V REF 12-BIT CAPACITIVE DAC 12 SUCCESSIVE APPROXIMATION REGISTER/PARALLEL TO SERIAL CONVERTER D OUT C LOAD OH OH should be tied to SS ZEROING SWITCH V CC GND V SS COMP D OUT LTC1400 • BD01 LOAD Hi Hi-Z OL LTC1400 • TC01 ...
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... Dynamic Performance The LTC1400 has excellent high speed sampling capabil- ity. FFT (Fast Fourier Transform) test techniques are used to test the ADC’s frequency response, distortion and noise at the rated throughput. By applying a low distortion sine wave and analyzing the digital output using an FFT algo- rithm, the ADC’ ...
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... Figure 2b. LTC1400 Nonaveraged, 4096 Point FFT Plot with 200kHz Input Frequency in Bipolar Mode where N is the effective number of bits of resolution and S/( expressed in dB. At the maximum sampling rate of 400kHz, the LTC1400 maintains very good ENOBs up to the Nyquist input frequency of 200kHz (refer to Figure 3). 12 ...
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... Nyquist. Driving the Analog Input The analog input of the LTC1400 is easy to drive. It draws only one small current spike while charging the sample- and-hold capacitor at the end of a conversion. During conversion, the analog input draws only a small leakage current ...
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... W U UNIPOLAR / BIPOLAR OPERATION AND ADJUSTMENT Figure 8 shows the ideal input/output characteristics for the LTC1400. The code transitions occur midway between successive integer LSB values (i.e., 0.5LSB, 1.5LSB, 2.5LSB, … FS – 1.5LSB). The output code is natural binary pin can be driven REF with 1LSB = 4.096/4096 = 1mV. Figure 9 shows the input/output transfer characteristics for the bipolar mode in two’ ...
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... LTC1400 output code flickers between 0000 0000 0000 and 0000 0000 0001. For zero full-scale error, apply an LTC1400 analog input of 4.0945V (FS – 1.5LSB or last code transi- tion) at the input and adjust R5 until the LTC1400 output GND code flickers between 1111 1111 1110 and 1111 1111 1111. ...
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... NOTE: NAP AND SLEEP ARE INTERNAL SIGNALS. REFRDY APPEARS AS A BIT IN THE nated at the LTC1400 GND pin. The ground return from the LTC1400 Pin 4 to the power supply should be low imped- ance for noise free operation. Digital circuitry grounds must be connected to the digital supply common. ...
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... Figure 12 shows the ways to power down the LTC1400. The chip can enter the Nap mode by keeping the CLK signal low and pulsing the CONV signal twice. For Sleep mode operation, CONV signal should be activated four times while CLK is kept low ...
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... Hardware Interface to TMS320C50’s TDM Serial Port (Frame Sync is Generated from TFSX Logic Analyzer Waveforms Show 3.2 s Throughput Rate (Input Voltage = 3.046V, Output Code = 1011 1110 0110 = 3046 Data from LTC1400 Loaded into TMS320C50’s TRCV Register X RDY Data Stored in TMS320C50’s Memory (in Right Justified Format) 0 ...
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... AND #1FFFh, 0 SACL *+, 0 LACC AR7 SUB #0F05h,0 BCND END_TRCV, GEQ ; If the end sample address has exceeded jump SPLK #040h, IMR RETE *After Obtained the Data from LTC1400, Program Jump to END_TRCV* END_TRCV: SPLK #002h, IMR CLRC INTM SUCCESS: B SUCCESS *Fill the Unused Interrupt with RETE, to avoid program get “lost”* ...
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... LTC1400 U TYPICAL APPLICATIONS LTC1400 Interface to ADSP2181’s SPORT0 (Frame Sync is Generated from RFS0 Logic Analyzer Waveforms Show 2.88 s Throughput Rate (Input Voltage = 2.240V, Output Code = 1000 1100 0000 = 2240 X RDY Data Stored in ADSP2181’s Memory (Normal Mode, SLEN = ...
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... U TYPICAL APPLICATIONS THIS PROGRAM DEMONSTRATES LTC1400 INTERFACE TO ADSP-2181 FRAME SYNC PULSE IS GENERATED FROM RFS0 /*Section 1: Initialization*/ .module/ram/abs = 0 adspltc; /*define the program module*/ jump start; /*jump over interrupt vectors*/ nop; nop; nop; rti; rti; rti; rti; /*code vectors here upon IRQ2 int*/ rti ...
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... RCK SRCK 74HC595 14 4 SER QH' 10 SRCLR 12 15 RCK SRCK QC D10 3 QD D11 74HC595 SER REFRDY QH' LTC1400 • TA03 ...
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... Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610) 8 0.228 – 0.244 (5.791 – 6.197) 1 0.053 – 0.069 (1.346 – 1.752) 0 – 8 TYP 0.014 – 0.019 (0.355 – 0.483) LTC1400 0.189 – 0.197* (4.801 – 5.004 0.150 – 0.157** (3.810 – 3.988 0.004 – ...
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... V SAMPLE RATE CC LTC1285/LTC1288 3V 7.5/6.6ksps LTC1286/LTC1298 5V 12.5/11.1ksps LTC1290 5/ 5V 50ksps LTC1296 5/ 5V 46.5ksps Linear Technology Corporation 20 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977 www.linear-tech.com LTC1400 Interface to TMS320C50 CLK UNIPOLAR A CONV IN INPUT 0.1 F LTC1400 REF ...