ISL97671 Intersil, ISL97671 Datasheet
ISL97671
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ISL97671 Summary of contents
Page 1
... The phase shift can be programmed with equal phase angle or adjustable in 7-bit resolution. The ISL97671 has a full range of dimming capabilities 2 that include SMBus/I C controlled PWM dimming or DC dimming ...
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... V = 4.5~26.5V IN FIGURE 2. ISL97671 TYPICAL APPLICATION DIAGRAM WITH EXTERNAL PWM SIGNAL CONTROL Block Diagram V = 4.5V TO 26.5V IN VIN VIN EN VDC REG OSC AND RAMP COMP f PWM LED PWM CONTROL COMP RSET AGND SMBCLK/SCL SMBUS/I SMBDAT/SDA INTERFACE AND PWM PWM CONTROl LOGIC 2 ISL97671 V ISL97671 1 FAULT ...
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... Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL97671. For more information on MSL please see techbrief TB363. Pin Descriptions (I = Input Output Supply) ...
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... Low Dropout Regulator................................ 13 In-rush Control and Soft-start........................... 14 Fault Protection and Monitoring ......................... 14 Short Circuit Protection (SCP) ........................... 14 Open Circuit Protection (OCP) ........................... 14 Overvoltage Protection (OVP) ........................... 15 Undervoltage Lock-out ..................................... 15 4 ISL97671 Input Overcurrent Protection............................ 15 Over-Temperature Protection (OTP) .................. 15 2 SMBus/I C Communications ................................ 18 Write Byte ......................................................... 18 Read Byte ......................................................... 18 Slave Device Address.......................................... 18 ...
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... V VDC LDO Droop Voltage LDO ENLow Guaranteed Range for EN Input Low Voltage ENHi Guaranteed Range for EN Input High Voltage 5 ISL97671 Thermal Information (T = +25°C) A Thermal Resistance (Typical QFN Package (Notes 4, 5, 7). Thermal Characterization (Typical QFN Package (Note ...
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... Headroom at CH Pin V Voltage at RSET Pin RSET ILEDmax Maximum LED Current per Channel PWM GENERATOR Guaranteed Range for PWM Input Low Voltage Guaranteed Range for PWM Input High Voltage 6 ISL97671 = 25° 12V 5V CONDITION (Note 8) TYP T = +25°C A 100% LED Duty Cycle ...
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... Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. 9. Independent from the numbers of LEDs, at minimum V 26.5V, minimum V is limited 28V. OUT 10. Limits established by characterization and are not production tested. 7 ISL97671 = 25° 12V 5V CONDITION Direct PWM Mode RFPWM = 660kΩ ...
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... CYCLE) 100 90 80 +25° 0°C +85° FIGURE 8. EFFICIENCY TEMPERATURE AT IN 20mA (100% LED DUTY CYCLE) 8 ISL97671 100 FIGURE 5. EFFICIENCY 30mA LED CURRENT IN 100 1.2MHz FIGURE 7. EFFICIENCY vs V 0.40 0.30 0.20 -40°C 0.10 0.00 -0.10 -0.20 -0.30 -0. FIGURE 9 ...
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... DC FIGURE 10. CURRENT LINEARITY vs LOW LEVEL PWM DIMMING DUTY CYCLE vs V FIGURE 12. V RIPPLE VOLTAGE, V OUT AT 20mA/CHANNEL FIGURE 14. IN-RUSH AND LED CURRENT AT V FOR 6P12S AT 20mA/CHANNEL 9 ISL97671 (Continued) 0.60 0.55 4 0.50 IN 0.45 0. FIGURE 11 12V, 6P12S FIGURE 13. IN-RUSH and LED CURRENT AT V ...
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... FROM 0% TO 100% PWM DIMMING, V FIGURE 19. ISL97671 SHUTS DOWN AND STOPS CHANGE LED SWITCHING ~ 30ms AFTER EN GOES LOW Enable The EN pin is used to enable or disable the ISL97671 operation high voltage pin that can be tied directly 26.5V if the system lacks of I/O for enable IN signal. OVP and V ...
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... SMBus/I “SMBus/I hand, the ISL97671 also provides PWM dimming by external PWM signal where the SMBCLK and SMBDAT pins need to pull low or grounded. The ISL97671 allows two ways of controlling the LED current SET current, and therefore, the brightness. They are: . The SET 1 ...
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... The PWM dimming frequency can be set or applied up to 30kHz with duty cycle from 0.4% to 100%. Phase Shift Control The ISL97671 is capable of delaying the phase of each current source to minimize load transients. By default, phase shifting is disabled as shown in Figure 21 where the channels PWM currents are switching uniformly. The ...
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... Fixed Delay with Integer only while the decimal value will be discarded (eg. 63.75=63) D1 FIGURE 23. 4 EQUAL PHASE CHANNELS PHASE SHIFT The ISL97671 allows the user to program the amount of phase shift degree in 7-bit resolution, as shown in Figure 24. To enable programmable phase shifting, the user must write to the Phase Shift Control register with EqualPhase = 0 and the desirable phase shift value of (EQ ...
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... Due to the lag in boost response to any load change at its output, certain transient events (such as LED current steps or significant step changes in LED duty cycle) can transiently look like LED fault modes. The ISL97671 uses feedback from the LEDs to determine when stable operating region and prevents apparent faults during these transient events from allowing any of the LED stacks to fault out ...
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... This monitoring happens on a cycle by cycle basis in a self protecting way. 15 ISL97671 Additionally, the ISL97671 monitors the voltage at the LX and OVP pins. At startup, a fixed current is injected out of the LX pins and into the output capacitor. The device will not start up unless the voltage at LX exceeds 1.2V. The ...
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... CH0 LED Open Upper OTP not Circuit but has triggered and CH0 < paralleled Zener 4V 6 CH0 LED Open Upper OTP triggered Circuit but has but CH0 < 4V paralleled Zener 16 ISL97671 LX LX O/P SHORT OVP FET LOGIC DRIVER VSC VSC THRM THRM REF ...
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... SMBus/I C Description S = start condition P = stop condition A = acknowledge A = not acknowledge R/W = read enable at high; write enable at low 17 ISL97671 TABLE 1. PROTECTIONS TABLE (Continued) FAILED CHANNEL ACTION CH0 remains ON and has highest VF, thus V OUT increases. Any channel at below the target current will fault out after 6 PWM cycles ...
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... SMBus/I C interface to enable the driving and controlling of various parameters that will be described in this section. Please note that the ISL97671 can also be controlled by an external PWM signal for PWM dimming without any SMBus/I so, the users need to pull the SMBCLK and SMBDAT pins to low or ground the pins permanently if SMBus/I control is not used ...
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... PWM Brightness Control Register 0x01 Device Control Register 0x02 Fault/Status Register 0x03 Identification Register 19 ISL97671 LSB 0 0 R/W TABLE 2A. ISL97671 REGISTER LISTING BIT 5 BIT 4 BIT 3 BIT 2 BRT5 BRT4 BRT3 BRT2 Reserved Reserved Reserved PWM_MD 2_CH_SD 1_CH_SD BL_STAT OV_CURR THRM_SHDN MFG2 MFG1 MFG0 ...
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... BIT ASSIGNMENT = 256 steps of PWM brightness levels BRT[7..0] FIGURE 30. DESCRIPTIONS OF BRIGHTNESS CONTROL REGISTER 20 ISL97671 DATA BIT DESCRIPTIONS BRTDC[7..0] = 256 steps of DC brightness control DirectPWM = Forces the PWM input signal to directly control the current sources. Bits 3, 4, and 5 should FSW = Switching frequencies selection, FSW = 0 = 1.2MHz. FSW = 1 = 600kMHz VSC[1 ...
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... TABLE 3. OPERATING MODES SELECTED BY DEVICE CONTROL REGISTER BITS 1 AND 2 PWM_MD PWM_SEL X 1 PWM Mode SMBus/I C Mode SMBus/I C and PWM Mode with DPST 21 ISL97671 RESERVE RESERVE D D PWM_MD PWM_SEL MODE 0 Backlight Off 2 1 SMBus/I C and PWM dimming (DPST) 1 PWMI controlled PWM dimming 2 1 ...
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... Bit 0 FAULT FIGURE 32. DESCRIPTIONS OF FAULT/STATUS REGISTER 22 ISL97671 • When FAULT is set will remain at 1 even if the signal which sets it goes away. FAULT will be cleared when the BL_CTL bit of the Device Control Register is toggled or when written low. At that time, if the fault condition is still present or reoccurs, FAULT will be set to 1 again ...
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... C Write Byte cycle to Register 0x07 sets the brightness level in DC only. 2 • An SMBus/I C Read Byte cycle to Register 0x07 returns the current DC brightness level. • Default value for Register 0x07 is 0xFF. 23 ISL97671 MFG1 MFG0 REV2 Bit 4 (R) Bit 3 (R) Bit 2 (R) BIT FIELD DEFINITIONS FIGURE 33 ...
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... Bit 7 (R/W) Bit 6 (R/W) Bit 5 (R/W) Bit 4 (R/W) Bit 3 (R/W) Bit 2 (R/W) Bit 1 (R/W) Bit 0 (R/W) BIT ASSIGNMENT CH[5..0] CH5 = Channel 5, CH4 = Channel 4 and so 24 ISL97671 faulty and optionally not enabling it in order to allow the rest of the system to continue to function. Additionally, a faulted out channel can be disabled and re-enabled in order to allow a retry for any faulty channel without having to power-down the other channels ...
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... D I where D is the switching duty cycle defined by the turn- on time over the switching period. V forward voltage that can be neglected for approximation. 25 ISL97671 Bit 4 (R/W) Bit 3 (R/W) BIT FIELD DEFINITIONS 7-bit Phase shift setting - phase shift between each channel is PhaseShift<6:0>/(255*PWMFreq) In direct PWM modes, phase shift between each channel is PhaseShift< ...
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... Schottky diode must be used. Applications High Current Applications Each channel of the ISL97671 can support up to 30mA. For applications that need higher current, multiple channels can be grouped to achieve the desirable current. For example, the cathode of the last LED can be ...
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... Multiple Drivers Operation For large LCD panels where more than 6channels of LEDs are needed, multiple ISL97671s with each driver having its own supporting components can be controlled together with the common SMBus/I ISL97671 does not have extra pins strappable slave address feature, but a separate EN signal can be applied to each driver for asynchronous operation ...
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... Package Outline Drawing L20.3x4 20 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 1, 3/10 3. PIN 1 INDEX AREA A TOP VIEW (2.65) (3.80) (1.65) (2.80) TYPICAL RECOMMENDED LAND PATTERN 28 ISL97671 A B 20X 4 4.00 0.15 (4X) VIEW "A-A" 20x 0.40±0.10 (16 x 0.50) (20 x 0.25) (20 x 0.60) NOTES: 1. Dimensions are in millimeters. Dimensions Dimensioning and tolerancing conform to AMSE Y14.5m-1994. ...