isl6721a Intersil Corporation, isl6721a Datasheet
isl6721a
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isl6721a Summary of contents
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... Data Sheet Flexible Single-ended Current Mode PWM Controller The ISL6721A is a low power, single-ended pulse width modulating (PWM) current mode controller designed for a wide range of DC/DC conversion applications including boost, flyback, and isolated output configurations. Peak current mode control effectively handles power transients and provides inherent overcurrent protection ...
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... RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL6721A. For more information on MSL please see Tech Brief TB363. 2 ISL6721A TEMP RANGE (° ...
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... ERROR AMPLIFIE 2. VFB VREF 20K 3.0V 12k 1.5V ON 30K OSCILLATOR COMPARATOR - RTCT + 1mA VREF 100 SYNC 4.5k 3 ISL6721A V REF 5. CHARGE VOLTAGE CLAMP SS CHARGED - OC DETECT + SHTDN OVERCURRENT COMPARATOR PWM COMPARATOR + - UV COMPARATOR START 1/3 100nS BLANKING S Q Bi-Directional Synchronization R Q OSC IN CLK OUT NO EXT SYNC ...
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... Typical Application - 48V Input Dual Output Flyback, 3.3V @ 2.5A, 1.8V @ 1.0A VIN 36-75V C1 R2 VIN- SYNC VR1 4 ISL6721A C18 R24 C2 C5 CR6 C3 TP1 R22 R23 R25 TP3 TP5 D2 R8 R10 R11 R9 SP1 SP2 CR5 T1 ISOLATION C21 + C15 XFMR R21 CR4 ...
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... Typical Boost Converter Application Schematic L1 VIN+ C1 VIN- 5 ISL6721A CR1 R12 C12 GATE VC PGND ISENSE SYNC VCC SLOPE VREF UV LGND OV SS RTCT COMP ISET VFB R5 R11 C11 VIN+ R10 C10 August 23, 2011 +VOUT RETURN ...
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... Peak GATE Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1A Operating Conditions Temperature Range ISL6721Axx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +105°C Supply Voltage Range (Typical, Note 9VDC to 18VDC CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. ...
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... Comparator High Threshold - with External SYNC Comparator Low Threshold Discharge Current SYNCHRONIZATION Input High Threshold Input Pulse Width Input Frequency Range Input Impedance VOH VOL SYNC Advance 7 ISL6721A = V < 20V 11kΩ 330 pF. Typical values are MIN TEST CONDITIONS (Note 9) (Note 10 0V ...
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... Fall Time Minimum ON time OVERCURRENT PROTECTION Minimum ISET Voltage Maximum ISET Voltage ISET Bias Current Restart Delay OV AND UV VOLTAGE MONITOR Overvoltage Threshold Undervoltage Fault Threshold 8 ISL6721A = V < 20V 11kΩ 330 pF. Typical values are MIN TEST CONDITIONS (Note 100pF 50 ...
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... TEMPERATURE (°C) FIGURE 1. EA REFERENCE VOLTAGE vs TEMPERATURE 1.002 0.996 0.989 0.983 0.976 0.970 -40 - TEMPERATURE (°C) FIGURE 3. OSCILLATOR FREQUENCY vs TEMPERATURE 9 ISL6721A = V < 20V 11kΩ 330 pF. Typical values are TEST CONDITIONS (Note 10) (Note 10) (Note 10) 1.002 1.002 1 ...
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... COMP - COMP is the output of the error amplifier and the input of the PWM comparator. The control loop frequency compensation network is connected between the COMP and FB pins. The ISL6721A features a built-in full cycle soft-start. Soft-start is implemented as a clamp on the maximum COMP voltage Feedback voltage input connected to the inverting input of the error amplifier ...
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... It is recommended that it be connected to signal ground. Functional Description Features The ISL6721A current mode PWMs make an ideal choice for low-cost flyback and forward topology applications requiring enhanced control and supervisory capability. With adjustable overvoltage and undervoltage thresholds, overcurrent threshold, and hic-cup delay, a highly flexible design with minimal external components is possible ...
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... CC is attempted. If the fault is cleared, a soft-start cycle begins. 12 ISL6721A Otherwise another shutdown cycle occurs condition also results in a shutdown fault, but the device does not enter the low power mode and no restart delay occurs when the fault clears ...
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... PGND ground plane. Reference Design The Typical Application Schematic on page 4 features the ISL6721A in a conventional dual output 10W discontinuous mode flyback DC/DC converter. The ISL6721EVAL1 demonstration unit implements this design and is available for evaluation. ...
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... It has more than the L required air gap volume to store the energy required, but was needed for the window area it provides Aeff = 31 • ISL6721A lg = 1.56 • 10 The flux density ΔB is only 0.069T or 690 gauss, a relatively (EQ. 9) low value. Since (Equation 13): μ • N μ ...
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... DS ON where r is the ON resistance of the MOSFET and DS(ON) Iprms is the RMS primary current. Determining the 15 ISL6721A conduction losses is complicated by the variation of r with temperature. As junction temperature increases, so does r , which increases losses and raises the DS(ON) junction temperature more, and so on possible for the device to enter a thermal runaway situation without proper heatsinking general rule of thumb, doubling the +25° ...
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... Control Loop Design The major components of the feedback control loop are a programmable shunt regulator, an opto-coupler, and the inverting amplifier of the ISL6721A. The opto-coupler is used to transfer the error signal across the isolation barrier. The opto-coupler offers a convenient means to cross the isolation barrier, but it adds complexity to the feedback control loop ...
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... When determining ISET, the internal gain and offset of the ISENSE 17 ISL6721A signal in the control IC must be taken into account. The maximum peak primary current was determined earlier to be 1.87A choice of 2.25A peak primary current for current limit is reasonable ...
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... 1kΩ open 100nF 100pF 14 18 ISL6721A A Bode plot of the closed loop system at low line, max load appears in Figures 9A and 9B. (EQ. 38) • (EQ. 39) and (EQ. 40) , and OUT Regulation Performance TABLE 1. OUTPUT LOAD REGULATION (A), 3.3V ...
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... ISL6721A = 48V (Continued) Waveforms IN Typical waveforms can be found in Figures 10 through 12. (V), 1.8V OUT Figure 10 shows the steady state operation of the sawtooth 1.785 oscillator waveform at RTCT (Trace 2), the SYNC output 1.805 pulse (Trace 1), and the GATE output to the converter FET (Trace 3) ...
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... Trace 2: RTCT Sawtooth Trace 3: GATE Output FIGURE 11. SOFT-START WITH OVERCURRENT FAULT Figure 12 shows the switching FET waveforms during steady state operation. Trace 1 is drain-source voltage and Trace 2 is gate-source voltage. 20 ISL6721A NOTE: Trace 1: V D-S Trace 3: V G-S FIGURE 12. GATE AND DRAIN-SOURCE WAVEFORMS FN6797 ...
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... ISL6721A VALUE 1.0µF Capacitor, 1812, X7R, 100V, 20% 0.1µF Capacitor, 0603, X7R, 25V, 10% 560µF Capacitor, Radial, SANYO 4SEP560M 470pF Capacitor, 0603, COG, 50V, 5% 0.01µF Capacitor, 0805, X7R, 50V, 10% 22µF Capacitor, 1210, X5R, 10V, 20% ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 22 ISL6721A FN6797.0 August 23, 2011 ...
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... M16.173 16 LEAD THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP) Rev 2, 5/10 5.00 ±0.10 16 6.40 4.40 ±0. 0. TOP VIEW H C SEATING PLANE 0.10 C SIDE VIEW (5.65) (0.65 TYP) TYPICAL RECOMMENDED LAND PATTERN 23 ISL6721A PIN #1 I.D. MARK 8 B 0.65 - 0.05 0.90 +0.15/-0.10 1.20 MAX 0.25 +0.05/-0. 0.05 MIN 0.15 MAX (1.45) NOTES: 1. Dimension does not include mold flash, protrusions or gate burrs. ...
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... L16.3x3B 16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 1, 4/07 3.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( 2. 80 TYP ) ( TYPICAL RECOMMENDED LAND PATTERN 24 ISL6721A ± 0.1 ( 12X 16X 16X 0 . 60) NOTES: 1. Dimensions are in millimeters. Dimensions Dimensioning and tolerancing conform to AMSE Y14.5m-1994. ...