IDT82V2044E Integrated Device Technology, IDT82V2044E Datasheet
IDT82V2044E
Manufacturer Part Number
IDT82V2044E
Description
4 Channel T1/j1/e1 Short Haul Liu
Manufacturer
Integrated Device Technology
Datasheet
1.IDT82V2044E.pdf
(73 pages)
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2003 Integrated Device Technology, Inc. All rights reserved.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FEATURES:
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DESCRIPTION:
J1 Line Interface Unit. The IDT82V2044E performs clock/data recovery,
AMI/B8ZS/HDB3 line decoding and detects and reports the LOS condi-
tions. An integrated Adaptive Equalizer is available to increase the receive
sensitivity and enable programming of LOS levels. In transmit path, there
is an AMI/B8ZS/HDB3 encoder and Waveform Shaper. There is one Jitter
Attenuator for each channel, which can be placed in either the receive path
or the transmit path. The Jitter Attenuator can also be disabled. The
IDT82V2044E supports both Single Rail and Dual Rail system interfaces
INDUSTRIAL TEMPERATURE RANGES
The IDT82V2044E can be configured as a quad T1, quad E1 or quad
- B8ZS/HDB3/AMI line encoding/decoding
Four channel T1/E1/J1 short haul line interfaces
Supports HPS (Hitless Protection Switching) for 1+1 protection
without external relays
Programmable T1/E1/J1 switchability allowing one bill of ma-
terial for any line condition
Single 3.3 V power supply with 5 V tolerance on digital interfaces
Meets or exceeds specifications in
- ANSI T1.102, T1.403 and T1.408
- ITU I.431, G.703,G.736, G.775 and G.823
- ETSI 300-166, 300-233 and TBR 12/13
- AT&T Pub 62411
Per channel software selectable on:
- Wave-shaping templates
- Line terminating impedance (T1:100 Ω, J1:110 Ω, E1:75 Ω/120 Ω)
- Adjustment of arbitrary pulse shape
- JA (Jitter Attenuator) position (receive path or transmit path)
- Single rail/dual rail system interfaces
- Active edge of transmit clock (TCLK) and receive clock (RCLK)
- Active level of transmit data (TDATA) and receive data (RDATA)
- Receiver or transmitter power down
QUAD CHANNEL T1/E1/J1
SHORT HAUL LINE INTERFACE UNIT
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and both serial and parallel control interfaces. To facilitate the network
maintenance, a PRBS/QRSS generation/detection circuit is integrated in
each channel, and different types of loopbacks can be set on a per channel
basis. Four different kinds of line terminating impedance, 75Ω, 100 Ω, 110
Ω and 120 Ω are selectable on a per channel basis. The chip also provides
driver short-circuit protection and supports JTAG boundary scanning.
Wireless Base Stations, IADs, IMAs, IMAPs, Gateways, Frame Relay
Access Devices, CSU/DSU equipment, etc.
The IDT82V2044E can be used in SDH/SONET, LAN, WAN, Routers,
- High impedance setting for line drivers
- PRBS (Pseudo Random Bit Sequence) generation and detection
- QRSS (Quasi Random Sequence Signals) generation and detection
- 16-bit BPV (Bipolar Pulse Violation)/Excess Zero/PRBS or QRSS
- Analog loopback, Digital loopback, Remote loopback and Inband
Adaptive receive sensitivity up to -20 dB
Non-intrusive monitoring per ITU G.772 specification
Short circuit protection for line drivers
LOS (Loss Of Signal) detection with programmable LOS levels
AIS (Alarm Indication Signal) detection
JTAG interface
Supports serial control interface, Motorola and Intel Non-Multi-
plexed interfaces
Package:
IDT82V2044E: 128-pin TQFP
with 2
with 2
error counter
loopback
15
20
-1 PRBS polynomials for E1
-1 QRSS polynomials for T1/J1
August 2004
IDT82V2044E
DSC-6533/-
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