ADAU1592 Analog Devices, Inc., ADAU1592 Datasheet

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ADAU1592

Manufacturer Part Number
ADAU1592
Description
Class-d Audio Power Amplifier
Manufacturer
Analog Devices, Inc.
Datasheet

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FEATURES
Integrated stereo modulator and power stage
0.005% THD + N
101 dB dynamic range
PSRR > 65 dB
R
Efficiency > 90% (8 Ω)
EMI-optimized modulator
On/off-mute pop-noise suppression
Short-circuit protection
Overtemperature protection
APPLICATIONS
Flat panel televisions
PC audio systems
Mini-components
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
DS-ON
< 0.3 Ω (per transistor)
SLC_TH
AGND
DGND
DVDD
AVDD
VREF
AINR
AINL
PGA0
PGA0
SLICER
PGA
PGA
REFERENCE
VOLTAGE
PGA1
PGA1
FUNCTIONAL BLOCK DIAGRAM
f
OSCILLATOR
CLK
XTI
CLOCK
/2
MODULATOR
XTO
Σ-Δ
MO/ST
Figure 1.
STDN
MODE CONTROL
TIME CONTROL
Class-D Audio Power Amplifier
LEVEL SHIFT
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
AND DEAD
GENERAL DESCRIPTION
The ADAU1592 is a 2-channel, bridge-tied load (BTL)
switching audio power amplifier with an integrated Σ-Δ
modulator.
The modulator accepts an analog input signal and generates
a switching output to drive speakers directly. A digital,
microcontroller-compatible interface provides control of reset,
mute, and PGA gain as well as output signals for thermal and
overcurrent error conditions. The output stage can operate
from supply voltages ranging from 9 V to 18 V. The analog
modulator and digital logic operate from a 3.3 V supply.
LOGIC
MUTE
ERR
OTW
TEMPERATURE/
OVERCURRENT
PROTECTION
ADAU1592
A1
A2
B1
B2
C1
C2
D1
D2
©2007 Analog Devices, Inc. All rights reserved.
PVDD
OUTL+
PGND
PVDD
OUTL–
PGND
PVDD
OUTR+
PGND
PVDD
OUTR–
PGND
ADAU1592
www.analog.com

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ADAU1592 Summary of contents

Page 1

... Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Class-D Audio Power Amplifier GENERAL DESCRIPTION The ADAU1592 is a 2-channel, bridge-tied load (BTL) switching audio power amplifier with an integrated Σ-Δ modulator. The modulator accepts an analog input signal and generates a switching output to drive speakers directly ...

Page 2

... ADAU1592 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Audio Performance ...................................................................... 3 DC Specifications ......................................................................... 4 Power Supplies .............................................................................. 4 Digital I/O ..................................................................................... 4 Digital Timing............................................................................... 5 Absolute Maximum Ratings............................................................ 6 Thermal Resistance ...................................................................... 6 ESD Caution.................................................................................. 6 Pin Configuration and Function Descriptions............................. 7 Typical Performance Characteristics ............................................. 9 Theory of Operation ...................................................................... 15 Overview...................................................................................... 15 Modulator.................................................................................... 15 Slicer ...

Page 3

... W, PGA gain = 0 dB OUT dB A-weighted, referred to 1% THD + N output dB A-weighted, measured with −60 dBFS input dB @ full-scale output voltage, 1% THD + N, 1 kHz PVDD = Ω PVDD = Ω μV μV μV μ kHz, 1.5 V p-p ripple, inputs ac-coupled to AGND ADAU1592 ...

Page 4

... ADAU1592 DC SPECIFICATIONS Table 2. Parameter INPUT IMPEDANCE OUTPUT DC OFFSET VOLTAGE POWER SUPPLIES Table 3. Parameter ANALOG SUPPLY VOLTAGE (AVDD) DIGITAL SUPPLY VOLTAGE (DVDD) POWER TRANSISTOR SUPPLY VOLTAGE (PVDD) POWER-DOWN CURRENT AVDD DVDD PVDD MUTE CURRENT AVDD DVDD PVDD OPERATING CURRENT AVDD DVDD PVDD DIGITAL I/O Table 4 ...

Page 5

... Time delay after MUTE held low until output stops switching STDN t INT t WAIT MIN MUTE Figure 2. Timing Diagram (Minimum) STDN t INT t WAIT TYP MUTE t OUTx+/OUTx– SW Figure 3. Timing Diagram (Typical) Rev Page ADAU1592 t HOLD MIN t HOLD TYP t OUTx+/OUTx– MUTE ...

Page 6

... ADAU1592 ABSOLUTE MAXIMUM RATINGS Table 6. Parameter Rating DVDD to DGND −0 +3.6 V AVDD to AGND −0 +3 PVDD to PGND −0 +20.0 V MUTE/STDN Inputs DGND − 0 DVDD + 0.3 V Operating Temperature Range −40°C to +85°C Storage Temperature Range −65°C to +150°C Maximum Junction Temperature 150° ...

Page 7

... Reserved for Internal Use. Connect to DGND. Analog Input Left Channel. Analog Input Right Channel. Reserved for Internal Use. Connect to DGND. Reserved for Internal Use. Connect to DGND. Output of High Power Transistors, Right Channel Positive Polarity. Rev Page ADAU1592 36 OUTR– 35 OUTR– 34 OUTR– ...

Page 8

... ADAU1592 Pin Number Mnemonic Type 34, 35, 36 OUTR− O 37, 38, 47, 48 PGND P 39, 40, 41, 42, PVDD P 43, 44, 45 input output power. 1 Description Output of High Power Transistors, Right Channel Negative Polarity. Power Ground for High Power Transistors. Internally connected to ePAD. Positive Power Supply for High Power Transistors. ...

Page 9

... Figure 9. THD or THD + N vs. Output Power, 6 Ω, PVDD = –10 –20 –30 –40 –50 –60 THD + N –70 –80 –90 THD –100 –110 –120 10m 10 Figure 10. THD or THD + N vs. Output Power, 8 Ω, PVDD = 12 V Rev Page ADAU1592 100m 1 10 OUTPUT POWER (W) 100m 1 10 OUTPUT POWER (W) 100m 1 10 OUTPUT POWER (W) ...

Page 10

... ADAU1592 0 –10 –20 –30 –40 –50 –60 THD + N –70 –80 –90 THD –100 –110 –120 10m 100m 1 OUTPUT POWER (W) Figure 11. THD or THD + N vs. Output Power, 4 Ω, PVDD = –10 –20 –30 –40 –50 –60 THD + N –70 –80 –90 THD –100 –110 – ...

Page 11

... Figure 22. Crosstalk @ Full Scale, 6 Ω, PVDD = 15 V, PGA = 0 dB Rev Page ADAU1592 0dBr = 15W FREQUENCY (kHz) RIGHT TO LEFT LEFT TO RIGHT 100 1k 10k ...

Page 12

... ADAU1592 0 –10 –20 –30 –40 –50 –60 –70 –80 THD + N –90 –100 THD –110 –120 20 100 1k FREQUENCY (Hz) Figure 23. THD or THD + N vs. Frequency @ Ω, PVDD = 15 V, PGA = –10 –20 –30 –40 –50 –60 –70 –80 THD + N –90 –100 THD –110 – ...

Page 13

... Figure 33. Power Dissipation vs. Output Power Ω, Stereo Mode Figure 34. Power Dissipation vs. Output Power Ω, Stereo Mode, Rev Page ADAU1592 POWER LIMITED DUE TO PACKAGE DISSIPATION OUTPUT POWER PER CHANNEL, STEREO MODE (W) Both Channels Driven POWER LIMITED DUE TO PACKAGE DISSIPATION 5 10 ...

Page 14

... ADAU1592 100 110 120 130 140 150 160 T (°C) AMBIENT Figure 35. Power Dissipation Derating vs. Ambient Temperature 40 POWER LIMITED DUE TO PACKAGE DISSIPATION 35 3Ω PVDD (V) Figure 36. Output Power vs. PVDD, Mono Mode THD + N 30 3Ω ...

Page 15

... This, in turn, limits the output power at a given supply voltage. The slicer in the ADAU1592 is normally inactive at lower input levels but is activated as soon as the peak input voltage exceeds the set threshold. The threshold can be set externally by connecting a resistor from SLC_TH (Pin 24) to ground ...

Page 16

... The outputs are capable of sinking 10 mA. The open-drain outputs are useful in multichannel applications where more than one ADAU1592 is used. The error outputs of multiple ADAU1592s can be OR’ simplify the system design. The = 1.1 V, logic outputs of the error flags ease the system design of using TH a microcontroller ...

Page 17

... To restore the operation, MUTE (Pin 15) needs to be toggled to low and then to high again. CLOCK LOSS DETECTION The ADAU1592 includes a clock loss detection circuit. In case the master clock to the part is lost, the ERR flag is set. This condition is latched. To restore operation, MUTE needs to be toggled low and high again ...

Page 18

... DVDD as well as PVDD. This helps detect undervoltage operation and eliminates the need to have an external mechanism to sense the supplies. The ADAU1592 monitors the DVDD and PVDD supply voltages and prevents the power stage from turning on if either of the supplies is not present or is below the operating threshold. ...

Page 19

... IN Normally, the offset due to leakage current in the C can be ignored compared The V MIS ble for the dc offset at the output. The ADAU1592 uses special self-calibration offset trim circuit, which controls the dc offset (due within ±3 mV. The V MIS part as well as for voltage and temperature. The trim circuit ...

Page 20

... XTO output to the XTI input of the next ADAU1592, and so on. However, using a simple logic buffer from the XTO pin of one ADAU1592 to the XTI pin of the next ADAU1592 is recommended. Because the clock output is now buffered, it can be connected to the XTI inputs of the remaining ADAU1592s, depending on the fanout capability of the logic buffer used ...

Page 21

... Load Impedance (Ω Rev Page 470µF PVDD L1 D1 OUTL 10Ω PVDD C5 680pF L2 D3 OUTL– PVDD L3 D5 OUTR 10Ω PVDD C6 680pF L4 D7 OUTR– Inductance Capacitance (μ (μ 0.68 ADAU1592 ...

Page 22

... R3 (kΩ) TH 1.1 24.9 1.17 20.5 1.24 16.5 1.32 12.4 3.3V PVDD 100nF 100nF 1µF 100nF 100nF OUTL+ OUTL– OUTR+ ADAU1592 OUTR– 24.576MHz CRYSTAL OR RESONATOR Figure 50. Typical Mono Application Circuit Table 14. Output Filter Component Values Load Impedance (Ω Rev Page 470µF PVDD 10Ω ...

Page 23

... ADAU1592ACPZ 1 −40°C to +85°C 1 ADAU1592ACPZ-RL −40°C to +85°C ADAU1592ACPZ-RL7 1 −40°C to +85°C 1 ADAU1592ASVZ −40°C to +85°C 1 ADAU1592ASVZ-RL −40°C to +85°C 1 ADAU1592ASVZ-RL7 −40°C to +85°C 1 EVAL-ADAU1592EBZ RoHS Compliant Part. 7.00 BSC SQ 0.60 MAX 37 36 TOP 6.75 VIEW BSC SQ 0.50 ...

Page 24

... ADAU1592 NOTES ©2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06749-0-9/07(A) Rev Page ...

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