AD7868 Analog Devices, AD7868 Datasheet
AD7868
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AD7868 Summary of contents
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... These parameters along with im- portant timing parameters are tested on every device. 3. Small Package. The AD7868 is available in a 24-pin DIP and a 28-pin SOIC package. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 ...
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... AD7868–SPECIFICATIONS ( 5 ADC SECTION unless otherwise noted.) Parameter 2 DYNAMIC PERFORMANCE 3, 4 Signal-to-Noise Ratio (SNR MIN MAX Total Harmonic Distortion (THD) Peak Harmonic or Spurious Noise Intermodulation Distortion (IMD) Second Order Terms Third Order Terms Track/Hold Acquisition Time ...
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... As per ADC Section Model AD7868AN AD7868AQ AD7868BN AD7868BQ AD7868AR AD7868BR *N = Plastic DIP Cerdip SOIC (Small Outline IC). –3– AD7868 unless otherwise noted.) MAX Test Conditions/Comments kHz Sine Wave kHz OUT SAMPLE Typically 71 +25 C for 0 < V ...
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... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7868 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
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... RI DAC DAC Voltage Reference Input. The voltage reference for the DAC must be applied to this pin internally buffered before being applied to the DAC. The nominal reference voltage for correct operation of the AD7868 ADC INTERFACE AND CONTROL 2 CLK Clock Input. An external TTL-compatible clock may be applied to this input. Alternatively, tying pin to V enables the internal laser-trimmed oscillator ...
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... AD7868 CONVERTER DETAILS The AD7868 is a complete 12-bit I/O port, the only external components required for normal operation are pull-up resistors for the ADC data outputs and power supply decoupling capaci- tors comprised of a 12-bit successive approximation ADC with a track/hold amplifier, a 12-bit DAC with a buffered output and two 3 V buried Zener references, a clock oscillator and con- trol logic ...
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... FREQUENCY – Hz Figure 3. Noise Spectral Density vs. Frequency INPUT/OUTPUT TRANSFER FUNCTIONS A bipolar circuit for the AD7868 is shown in Figure 4. The ana- log input/output voltage range of the AD7868 The de- signed code transitions for the ADC occur midway between successive integer LSB values (i.e., 1/2 LSB, 3/2 LSB, 5/2 LSB . . . FS – ...
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... DT input. Data must be valid on the falling edge of TCLK. The TFS input provides the frame synchronization sig- nal which tells the AD7868 DAC that valid serial data will be available for the next 16 falling edges of TCLK. Figure 8 shows the timing diagram for the serial data format. ...
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... SNR data can be ob- tained. Figure 9 shows a typical 2048 point FFT plot of the AD7868BQ ADC with an input signal of 10 kHz and a sam- pling frequency of 83 kHz. The SNR obtained from this graph is 73 dB. It should be noted that the harmonics are taken into account when calculating the SNR ...
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... AD7868 DAC output is measured. Figure 12 shows a typical 2048 point Fast Fourier Transform plot for the AD7868 DAC with an update rate of 83 kHz and an output frequency of 1 kHz. The SNR obtained from the graph is 73 dBs. ...
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... Data transfers, which occur during ADC conver- sions, are between the processor receive and transmit shift regis- ters and the AD7868’s ADC and DAC. At the end of each 16-bit transfer the DSP56000 receives an internal interrupt indi- cating the transmit register is empty and the receive register is full ...
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... ADC’s digital outputs are buffered with 74HC4050s. These buffers provide a higher current output capability for high capacitance loads or cables. Normally, these buffers are not required as the AD7868 will be sitting on the same board as the processor. POWER SUPPLY CONNECTIONS The PCB requires two analog power supplies and one 5 V digi- tal supply ...
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... 15k R /C EXT EXT C22 A 68pF C EXT B 5V CLR IC8 1/2 74HC221 GND SKT3 LDAC Figure 19. Input/Output Circuit Based on the AD7868 CONNECT Figure 20. SKT6, D-Type Connector Pinout REV OUT C1 C2 IC5 0 78L05 ...
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... LK8 provides the option of tying the ADC RFS output to the DAC TFS input. LK9 Transmit/Receive Clock Option LK9 provides the option to connect the ADC RCLK to the DAC TCLK. Figure 21. Silkscreen for the Circuit Diagram of Figure 19 COMPONENT LIST IC1 AD7868 IC2, IC3 2X AD711 IC4, ADG201HS IC5, MC78L05 IC6, ...
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... Figure 22. Component Side Layout for the Circuit Diagram of Figure 19 Figure 23. Solder Side Layout for the Circuit Diagram of Figure 19 REV. B –15– AD7868 ...
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... AD7868 24-Pin Plastic (N-24) OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 28-Pin Plastic SOIC (R-28) –16– 24-Pin Cerdip (Q-24) REV. B ...