74vhc574 STMicroelectronics, 74vhc574 Datasheet
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74vhc574
Manufacturer Part Number
74vhc574
Description
Octal D-type Flip Flop With 3 State Output Non Inverting
Manufacturer
STMicroelectronics
Datasheet
1.74VHC574.pdf
(14 pages)
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Part Number:
74VHC574
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Quantity:
20 000
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DESCRIPTION
The 74VHC574 is an advanced high-speed
CMOS OCTAL D-TYPE FLIP FLOP with 3 STATE
OUTPUTS NON INVERTING fabricated with
sub-micron silicon gate and double-layer metal
wiring C
These 8 bit D-Type flip-flop is controlled by a clock
input (CK) and an output enable input (OE).
On the positive transition of the clock, the Q
outputs will be set to the logic states that were
setup at the D inputs.
While the (OE) input is low, the 8 outputs will be in
a normal logic state (high or low logic level) and
Figure 1: Pin Connection And IEC Logic Symbols
November 2004
HIGH SPEED:
f
LOW POWER DISSIPATION:
I
HIGH NOISE IMMUNITY:
V
POWER DOWN PROTECTION ON INPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
BALANCED PROPAGATION DELAYS:
t
OPERATING VOLTAGE RANGE:
V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 574
IMPROVED LATCH-UP IMMUNITY
LOW NOISE: V
MAX
CC
PLH
OH
NIH
CC
= 4 A (MAX.) at T
| = I
(OPR) = 2V to 5.5V
2
= 180 MHz (TYP.) at V
= V
MOS technology.
t
PHL
OL
NIL
= 8 mA (MIN)
= 28% V
OLP
= 0.9V (MAX.)
CC
A
=25°C
(MIN.)
WITH 3 STATE OUTPUTS NON INVERTING
CC
= 5V
Table 1: Order Codes
while high level the outputs will be in a high
impedance state.
The Output control does not affect the internal
operation of flip flop; that is, the old data can be
retained or the new data can be entered even
while the outputs are off.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
OCTAL D-TYPE FLIP FLOP
PACKAGE
TSSOP
SOP
SOP
74VHC574
Rev. 4
74VHC574MTR
74VHC574TTR
TSSOP
T & R
1/14