74AUP1G97 Philips Semiconductors, 74AUP1G97 Datasheet

no-image

74AUP1G97

Manufacturer Part Number
74AUP1G97
Description
Low-power configurable multiple function gate
Manufacturer
Philips Semiconductors
Datasheet
1. General description
2. Features
The 74AUP1G97 is a high-performance, low-power, low-voltage, Si-gate CMOS device,
superior to most advanced CMOS compatible TTL families.
This device ensures a very low static and dynamic power consumption across the entire
V
This device is fully specified for partial power-down applications using I
The I
the device when it is powered down.
The 74AUP1G97 provides configurable multiple functions. The output state is determined
by eight patterns of 3-bit input. The user can choose the logic functions MUX, AND, OR,
NAND, NOR, inverter and buffer. All inputs can be connected to V
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
The inputs switch at different points for positive and negative-going signals. The difference
between the positive voltage V
hysteresis voltage V
CC
74AUP1G97
Low-power configurable multiple function gate
Rev. 01 — 7 November 2006
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
ESD protection:
Low static power consumption; I
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
I
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
OFF
range from 0.8 V to 3.6 V.
OFF
HBM JESD22-A114-D Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101-C exceeds 1000 V
circuitry provides partial Power-down mode operation
circuitry disables the output, preventing the damaging backflow current through
H
.
CC
range from 0.8 V to 3.6 V.
T+
and the negative voltage V
CC
= 0.9 A (maximum)
CC
T
is defined as the input
CC
Product data sheet
or GND.
OFF
.

Related parts for 74AUP1G97

74AUP1G97 Summary of contents

Page 1

... The I OFF the device when it is powered down. The 74AUP1G97 provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions MUX, AND, OR, NAND, NOR, inverter and buffer. All inputs can be connected to V ...

Page 2

... C to +125 C 74AUP1G97GF +125 C 4. Marking Table 2. Marking Type number 74AUP1G97GW 74AUP1G97GM 74AUP1G97GF 5. Functional diagram Fig 1. Logic symbol 74AUP1G97_1 Product data sheet Low-power configurable multiple function gate Description SC-88 plastic surface-mounted package; 6 leads XSON6 plastic extremely thin small outline package; no leads; ...

Page 3

... Description data input B ground (0 V) data input A data output Y supply voltage data input Rev. 01 — 7 November 2006 74AUP1G97 74AUP1G97 GND 001aae001 Transparent top view Fig 4. Pin configuration SOT891 (XSON6) ...

Page 4

... Fig 6. 2-input AND gate 001aae004 Fig 8. 2-input NOR gate with input B inverted 001aae006 Fig 10. Inverter Rev. 01 — 7 November 2006 74AUP1G97 001aae003 001aae005 ...

Page 5

... < Active mode and Power-down mode +125 C amb derates linearly with 4.0 mW/K. tot derates linearly with 2.4 mW/K. tot Conditions Active mode Power-down mode; V Rev. 01 — 7 November 2006 74AUP1G97 Min Max 0.5 +4 [1] 0.5 +4 [1] 0.5 +4 ...

Page 6

... 1 1 1 2 3 2 4 Rev. 01 — 7 November 2006 74AUP1G97 Min Typ Max ...

Page 7

... 2 4 GND Rev. 01 — 7 November 2006 74AUP1G97 Low-power configurable multiple function gate Min Typ - - - - - - - - - - - - - - - - - - - - ...

Page 8

... [2] Figure Rev. 01 — 7 November 2006 74AUP1G97 Low-power configurable multiple function gate Min Typ - - - - [ 13 +125 C [1] Min Typ Max Min ( ...

Page 9

... CC [3] = GND where Rev. 01 — 7 November 2006 74AUP1G97 Low-power configurable multiple function gate 13 +125 C [1] Min Typ Max Min ( 38 4.6 10.5 20.9 4.0 3.7 7.4 12.2 3.8 3.5 6.3 9.9 3.2 3.4 5 ...

Page 10

... Y output PLH output Table 10. Input 0 Rev. 01 — 7 November 2006 74AUP1G97 Low-power configurable multiple function gate PLH PHL V M 001aab593 3.0 ns © NXP B.V. 2006. All rights reserved ...

Page 11

... Min and Figure 15 = 0.8 V 0.30 = 1.1 V 0.53 = 1.4 V 0.74 = 1.65 V 0.91 = 2.3 V 1.37 = 3.0 V 1.88 and Figure 15 = 0.8 V 0.10 = 1.1 V 0.26 = 1.4 V 0.39 = 1.65 V 0.47 = 2.3 V 0.69 = 3.0 V 0.88 Rev. 01 — 7 November 2006 74AUP1G97 V EXT 001aac521 of the pulse generator EXT PLH PHL PZH PHZ open GND 13 +125 C Typ Max ...

Page 12

... Product data sheet …continued Figure Min V ); see Figure 14, T 15, Figure 16 and = 0.8 V 0.07 = 1.1 V 0.08 = 1.4 V 0.18 = 1.65 V 0.27 = 2.3 V 0.53 = 3 mna207 Fig 15. Definition of V Rev. 01 — 7 November 2006 74AUP1G97 Low-power configurable multiple function gate 13 +125 C Typ Max Min Max ( 0.50 0.07 0.50 - 0.46 0.08 0.46 - 0.56 0.18 0.56 - 0.66 0.27 0.66 - 0.92 0.53 0. ...

Page 13

... Fig 17. Typical transfer characteristics; V 74AUP1G97_1 Product data sheet Low-power configurable multiple function gate 240 160 0.4 0.8 1 1200 800 400 0 0 1.0 2 Rev. 01 — 7 November 2006 74AUP1G97 001aad691 1.6 2.0 V (V) I 001aad692 3.0 V (V) I © NXP B.V. 2006. All rights reserved ...

Page 14

... scale 2.2 1.35 2.2 1.3 0.65 1.8 1.15 2.0 REFERENCES JEDEC JEITA SC-88 Rev. 01 — 7 November 2006 74AUP1G97 Low-power configurable multiple function gate detail 0.45 0.25 0.2 0.2 0.1 0.15 0.15 EUROPEAN PROJECTION SOT363 ISSUE DATE ...

Page 15

... scale 1.05 0.35 0.40 0.6 0.5 0.95 0.27 0.32 REFERENCES JEDEC JEITA MO-252 Rev. 01 — 7 November 2006 74AUP1G97 Low-power configurable multiple function gate 4 ( EUROPEAN PROJECTION SOT886 ISSUE DATE 04-07-15 04-07-22 © NXP B.V. 2006. All rights reserved ...

Page 16

... Product data sheet scale 1.05 0.35 0.40 0.55 0.35 0.95 0.27 0.32 REFERENCES JEDEC JEITA Rev. 01 — 7 November 2006 74AUP1G97 Low-power configurable multiple function gate 2 mm EUROPEAN PROJECTION SOT891 ISSUE DATE 05-03-11 05-04-06 © NXP B.V. 2006. All rights reserved ...

Page 17

... Revision history Table 14. Revision history Document ID Release date 74AUP1G97_1 20061107 74AUP1G97_1 Product data sheet Low-power configurable multiple function gate Data sheet status Product data sheet Rev. 01 — 7 November 2006 74AUP1G97 Change notice Supersedes - - © NXP B.V. 2006. All rights reserved ...

Page 18

... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com Rev. 01 — 7 November 2006 74AUP1G97 © NXP B.V. 2006. All rights reserved ...

Page 19

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2006. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All rights reserved. Date of release: 7 November 2006 Document identifier: 74AUP1G97_1 ...

Related keywords