74AUP1G09 Philips Semiconductors, 74AUP1G09 Datasheet

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74AUP1G09

Manufacturer Part Number
74AUP1G09
Description
Low-power 2-input AND Gate
Manufacturer
Philips Semiconductors
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
74AUP1G09GF
Manufacturer:
NXP/恩智浦
Quantity:
20 000
www.DataSheet4U.com
1. General description
2. Features
The 74AUP1G09 provides the single 2-input AND gate with an open-drain output. The
output of the device is an open-drain and can be connected to other open-drain outputs to
implement active-LOW wired-OR or active-HIGH wired-AND functions.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
This device ensures a very low static and dynamic power consumption across the entire
V
This device is fully specified for partial Power-down applications using I
The I
the device when it is powered down.
I
I
I
I
I
I
I
I
I
I
I
CC
74AUP1G09
Low-power 2-input AND gate with open-drain
Rev. 01 — 15 January 2009
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
ESD protection:
Low static power consumption; I
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
I
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
OFF
N
N
N
N
N
N
N
N
range from 0.8 V to 3.6 V.
OFF
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
HBM JESD22-A114E exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101C exceeds 1000 V
circuitry provides partial Power-down mode operation
circuitry disables the output, preventing the damaging backflow current through
CC
range from 0.8 V to 3.6 V.
CC
= 0.9 A (maximum)
CC
Product data sheet
OFF
.

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74AUP1G09 Summary of contents

Page 1

... Low-power 2-input AND gate with open-drain Rev. 01 — 15 January 2009 1. General description The 74AUP1G09 provides the single 2-input AND gate with an open-drain output. The output of the device is an open-drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions. ...

Page 2

... Package Temperature range Name 74AUP1G09GW +125 C 74AUP1G09GM +125 C 74AUP1G09GF +125 C 4. Marking Table 2. Marking Type number 74AUP1G09GW 74AUP1G09GM 74AUP1G09GF 5. Functional diagram 001aad598 Fig 1. Logic symbol 74AUP1G09_1 Product data sheet Low-power 2-input AND gate with open-drain ...

Page 3

... Rev. 01 — 15 January 2009 74AUP1G09 Low-power 2-input AND gate with open-drain V 74AUP1G09 n. GND 3 Transparent top view Fig 6. Pin configuration SOT891 (XSON6) Output © NXP B.V. 2009. All rights reserved. ...

Page 4

... Active mode and Power-down mode Conditions Rev. 01 — 15 January 2009 74AUP1G09 Min Max Unit 0.5 +4 [1] 0.5 +4 [1] 0 ...

Page 5

... 1 2 3 2 4 GND Rev. 01 — 15 January 2009 74AUP1G09 Min Typ Max - - ...

Page 6

... GND Rev. 01 — 15 January 2009 74AUP1G09 Min Typ Max Unit - - 0.75V - - ...

Page 7

... V to 2 3.6 V 1.6 CC [2] Figure 0 1 1 1 1. 2 3.6 V 2.3 CC Rev. 01 — 15 January 2009 74AUP1G09 Low-power 2-input AND gate with open-drain +125 C [1] Typ Max Min Max ( 4.6 10.4 1.8 11.4 3.3 6.5 1.4 7.4 2.9 5.1 1.1 5.9 2.2 3.8 0.9 4.5 2.3 4.0 0.8 4.5 16 ...

Page 8

... W GND t PLZ output Table 9. Input Output 0.5V 0.5V CC 0.5V 0.5V CC 0.5V 0.5V CC Rev. 01 — 15 January 2009 74AUP1G09 Low-power 2-input AND gate with open-drain +125 C [1] Typ Max Min Max ( ...

Page 9

... For measuring propagation delays, set-up and hold times, and pulse width, R 74AUP1G09_1 Product data sheet DUT R T 10. [ Rev. 01 — 15 January 2009 74AUP1G09 Low-power 2-input AND gate with open-drain V EXT 001aac521 of the pulse generator EXT PLH PHL ...

Page 10

... 0.30 0.25 2.25 1.35 0.15 0.65 0.15 0.08 1.85 1.15 REFERENCES JEDEC JEITA MO-203 SC-88A Rev. 01 — 15 January 2009 74AUP1G09 Low-power 2-input AND gate with open-drain detail 2.25 0.46 1.3 0.425 0.3 0.1 0.1 2.0 ...

Page 11

... Low-power 2-input AND gate with open-drain scale 1.05 0.35 0.40 0.6 0.5 0.95 0.27 0.32 REFERENCES JEDEC JEITA MO-252 Rev. 01 — 15 January 2009 74AUP1G09 SOT886 4 ( EUROPEAN ISSUE DATE PROJECTION 04-07-15 04-07-22 © NXP B.V. 2009. All rights reserved ...

Page 12

... Low-power 2-input AND gate with open-drain scale 1.05 0.35 0.40 0.55 0.35 0.95 0.27 0.32 REFERENCES JEDEC JEITA Rev. 01 — 15 January 2009 74AUP1G09 SOT891 4 ( EUROPEAN ISSUE DATE PROJECTION 05-04-06 07-05-15 © NXP B.V. 2009. All rights reserved ...

Page 13

... Revision history Table 12. Revision history Document ID Release date 74AUP1G09_1 20090115 74AUP1G09_1 Product data sheet Low-power 2-input AND gate with open-drain Data sheet status Change notice Product data sheet - Rev. 01 — 15 January 2009 74AUP1G09 Supersedes - © NXP B.V. 2009. All rights reserved ...

Page 14

... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com Rev. 01 — 15 January 2009 74AUP1G09 © NXP B.V. 2009. All rights reserved ...

Page 15

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2009. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Document identifier: 74AUP1G09_1 All rights reserved. Date of release: 15 January 2009 ...

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