74ACTQ16374 Fairchild Semiconductor, 74ACTQ16374 Datasheet
74ACTQ16374
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74ACTQ16374 Summary of contents
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... MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide 74ACTQ16374MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. ...
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Functional Description The ACTQ16374 consists of sixteen edge-triggered flip- flops with individual D-type inputs and 3-STATE true out- puts. The device is byte controlled with each byte function- ing identically, but independent of the other. The control pins can be ...
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Absolute Maximum Ratings Supply Voltage ( Input Diode Current ( 0. 0. Output Diode Current ( 0. 0. Output ...
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AC Electrical Characteristics Symbol Parameter f Maximum Clock Frequency MAX t Propagation Delay PLH PHL n t Output Enable Time PZH t PZL t Output Disable Time PHZ t PLZ Note 8: Voltage Range 5.0 is ...
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Extended AC Electrical Characteristics Symbol Parameter t Propagation Delay PLH t Data to Output PHL t Output Enable Time PZH t PZL t Output Disable Time PHZ t PLZ t Pin to Pin Skew OSHL (Note 12) HL Data to ...
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FACT Noise Characteristics The setup of a noise characteristics measurement is critical to the accuracy and repeatability of the tests. The following is a brief description of the setup used to measure the noise characteristics of FACT. Equipment: Hewlett Packard ...
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Physical Dimensions inches (millimeters) unless otherwise noted 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide Package Number MS48A 7 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...