AD9549/PCBZ Analog Devices Inc, AD9549/PCBZ Datasheet - Page 52

• Manufacturer Part Number: AD9549/PCBZ
• Description: BOARD EVALUATION FOR AD9549
• Manufacturer: Analog Devices Inc

Specifications of AD9549/PCBZ

• Main Purpose: Timing, Clock Generator
• Embedded: No
• Utilized Ic / Part: AD9549
• Primary Attributes: 2 Inputs, 2 Outputs, VCO
• Secondary Attributes: CMOS, HSTL Output Logic, Graphical User Interface
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9549
Addr
(Hex)
Calibration (user-accessible trim)
0x0400
0x0401
0x0402
0x0403
0x0404
0x0405
0x0406
0x0407
0x0408
0x0409
0x040A
0x040B
0x040C
0x040D
0x040E
0x040F
0x0410
Harmonic spur reduction
0x0500
0x0501
0x0502
0x0503
0x0504
0x0505
0x0506
0x0507
0x0508
0x0509
1
Types of registers: RO = read-only, AC = autoclear, M = mirrored (also called buffered). A mirrored register needs an I/O update for the new value to take effect.
Type
M
M
RO
M
M
M
M
M
M
M
M
M
M
M
M
1
Name
K-divider
CPFD gain
FPFD gain
Reserved
Part
version
Reserved
PFD offset
DAC
full-scale
current
Reserved
Reserved
Reference
bias level
Reserved
Spur A
Spur B
Bit 7
Part
version
HSR-A
enable
HSR-B
enable
Bit 6
Part
version
Amplitude
gain × 2
Amplitude
gain × 2
Bit 5
Rev. D | Page 52 of 76
Reserved
Reserved
DAC full-scale current, Bits[7:0]
Spur A magnitude, Bits[7:0]
DPLL phase offset, Bits[7:0]
Spur B magnitude, Bits[7:0]
Bit 4
Spur A phase, Bits[7:0]
Spur B phase, Bits[7:0]
K-divider, Bits[15:0]
FPFD gain, Bits[7:0]
Reserved
Reserved
Reserved
Reserved
Reserved
DPLL phase offset, Bits[13:8]
Bit 3
CPFD gain, Bits[5:0]
Reserved
BIt 2
Spur A harmonic, Bits[3:0]
Spur B harmonic[3:0]
CPFD gain scale, Bits[2:0]
Bit 1
DC input level, Bits[1:0]
DAC full-scale current,
Bits[9:8]
Bit 0
Spur A
phase,
Bit 8
Spur B
phase,
Bit 8
Default
(Hex)
0x01
0x00
0x00
0x20
0x00 or
0x40
0x00
0x00
0xFF
0x01
0x10
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0xC8