ATICE50 Atmel, ATICE50 Datasheet - Page 28
ATICE50
Manufacturer Part Number
ATICE50
Description
EMULATOR IN CIRCUIT MEGAAVR
Manufacturer
Atmel
Specifications of ATICE50
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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2523A–AVR–11/02
General Description
3.5.3
3.5.4
3-14
Analog Comparator
A/D Converter
The Analog Comparator is built around a high speed comparator and a CMOS output
buffer/voltage converter. Figure 3-20 shows the Analog Comparator block diagram. The
total propagation delay from the AIN0 and AIN1 pins to the internal ACO signal is typi-
cally 90ns, max 210ns. For parts, the total propagation delay from the AIN0 and AIN1
pins to the internal ACO signal is typically 500 ns, max 750 ns.
The comparator features an internal hysteresis of typical 1 mV, max 4 mV @ 25 C to
ensure clean switching.
Figure 3-20. Analog Comparator Block Diagram
The block diagram of the ICE50 AD converter is shown in Figure 3-21.
Figure 3-21. ICE50 AD Converter
AVCC
ADC7
ADC6
ADC5
ADC4
ADC3
ADC2
ADC1
ADC0
2.5V
Aref
330Ω
330Ω
330Ω
330Ω
330Ω
330Ω
330Ω
330Ω
330Ω
330Ω
ACBG
ACME
ADEN
Pos
Input
Mux
Neg
Input
Mux
ADC Multiplexer
Output
AIN0
1.2V
AIN1
ADMUX Decoder
V
V
CC
CC
Aref Out
1.2V
ANALOG COMPARATOR
Voltage
Reference
Selection
A/D Converter
+
-
1x/10x/100x
+
-
+
-
ref
ADC Multiplexer Output
10K
ACD
10K
10K
10K
+
-
100R
+
-
1x/2x
ref
Vref
ACO
2
ICE50 User Guide
Vin
Vref
10-bit ADC
Q[0..9]
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