R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 757
R0K572011S000BE
Manufacturer Part Number
R0K572011S000BE
Description
KIT STARTER FOR SH7201
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets
1.R0K572011S000BE.pdf
(1222 pages)
2.R0K572011S000BE.pdf
(7 pages)
3.R0K572011S000BE.pdf
(5 pages)
Specifications of R0K572011S000BE
Contents
CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
For Use With/related Products
SH7201
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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SH7201 Group
The I
interface functions. However, the configuration of the registers that control the I
partly from the Philips register configuration.
17.1
• Selection of I
• Continuous transmission/reception
I
• Start and stop conditions generated automatically in master mode
• Selection of acknowledge output levels when receiving
• Automatic loading of acknowledge bit when transmitting
• Bit synchronization/wait function
• Six interrupt sources
• The direct memory access controller (DMAC) can be activated by a transmit-data-empty
• Direct bus drive
Clocked synchronous serial format:
• Four interrupt sources
• The direct memory access controller (DMAC) can be activated by a transmit-data-empty
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
2
C bus format:
Since the shift register, transmit data register, and receive data register are independent from
each other, the continuous transmission/reception can be performed.
In master mode, the state of SCL is monitored per bit, and the timing is synchronized
automatically. If transmission/reception is not yet possible, set the SCL to low until
preparations are completed.
Transmit data empty (including slave-address match), transmit end, receive data full (including
slave-address match), arbitration lost, NACK detection, and stop condition detection
request or receive-data-full request to transfer data.
Two pins, SCL0 to SCL2 and SDA0 to SDA2, function as NMOS open-drain outputs when the
bus drive function is selected.
Transmit-data-empty, transmit-end, receive-data-full, and overrun error
request or receive-data-full request to transfer data.
2
C bus interface 3 conforms to and provides a subset of the Philips I
Features
2
C format or clocked synchronous serial format
Section 17 I
2
C Bus Interface 3 (IIC3)
Section 17 I
2
C (Inter-IC) bus
2
2
C Bus Interface 3 (IIC3)
C bus differs
Page 729 of 1190
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