R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 712
R0K572011S000BE
Manufacturer Part Number
R0K572011S000BE
Description
KIT STARTER FOR SH7201
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets
1.R0K572011S000BE.pdf
(1222 pages)
2.R0K572011S000BE.pdf
(7 pages)
3.R0K572011S000BE.pdf
(5 pages)
Specifications of R0K572011S000BE
Contents
CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
For Use With/related Products
SH7201
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 712 of 1222
- Download datasheet (8Mb)
Section 16 Serial Communication Interface with FIFO (SCIF)
16.3.7
SCFSR is a 16-bit register. The upper 8 bits indicate the number of receives errors in the receive
FIFO data register, and the lower 8 bits indicate the status flag indicating SCIF operating state.
The CPU can always read and write to SCFSR, but cannot write 1 to the status flags (ER, TEND,
TDFE, BRK, RDF, and DR). These flags can be cleared to 0 only if they have first been read
(after being set to 1). Bits 3 (FER) and 2 (PER) are read-only bits that cannot be written. SCFSR is
initialized by a power-on reset or in deep standby mode.
Page 684 of 1190
Bit
15 to 12
11 to 8
Initial value:
Note:
R/W:
Bit:
* Only 0 can be written to clear the flag after 1 is read.
Serial Status Register (SCFSR)
Bit Name
PER[3:0]
FER[3:0]
15
R
0
14
PER[3:0]
R
0
13
R
0
Initial
Value
0000
0000
12
R
0
11
R
0
R/W
R
R
10
R
FER[3:0]
0
Description
Number of Parity Errors
Indicate the quantity of data including a parity error in
the receive data stored in the receive FIFO data
register (SCFRDR). After the ER bit in SCFSR is set,
the value indicated by bits 15 to 12 represents the
number of parity errors in SCFRDR. When parity
errors have occurred in all 16-byte receive data in
SCFRDR, PER3 to PER0 show 0.
Number of Framing Errors
Indicate the quantity of data including a framing error
in the receive data stored in SCFRDR. After the ER
bit in SCFSR is set, the value indicated by bits 11 to 8
represents the number of framing errors in SCFRDR.
When framing errors have occurred in all 16-byte
receive data in SCFRDR, FER3 to FER0 show 0.
R
9
0
R
8
0
R/(W)*R/(W)*R/(W)*R/(W)*
ER
7
0
TEND TDFE BRK
6
1
5
1
4
0
R01UH0026EJ0300 Rev. 3.00
FER
R
3
0
PER
R
2
0
R/(W)*R/(W)*
SH7201 Group
RDF
Sep 24, 2010
1
0
DR
0
0
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