R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 447
R0K572011S000BE
Manufacturer Part Number
R0K572011S000BE
Description
KIT STARTER FOR SH7201
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets
1.R0K572011S000BE.pdf
(1222 pages)
2.R0K572011S000BE.pdf
(7 pages)
3.R0K572011S000BE.pdf
(5 pages)
Specifications of R0K572011S000BE
Contents
CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
For Use With/related Products
SH7201
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 447 of 1222
- Download datasheet (8Mb)
SH7201 Group
12.3.7
TBTM is an 8-bit readable/writable register that specifies the timing for transferring data from the
buffer register to the timer general register in PWM mode. The MTU2 has three TBTM registers,
one each for channels 0, 3, and 4.
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Bit
7 to 3
2
1
Bit Name
—
TTSE
TTSB
Timer Buffer Operation Transfer Mode Register (TBTM)
Initial value:
Initial
Value
All 0
0
0
R/W:
Bit:
—
R
R/W
R
R/W
R/W
7
0
—
R
6
0
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Timing Select E
Specifies the timing for transferring data from TGRF_0
to TGRE_0 when they are used together for buffer
operation.
For channels 3 and 4, bit 2 is reserved. It is always read
as 0 and the write value should always be 0.
Do not set this bit to 1 when channel 0 is to be used in
a mode other than PWM mode.
0: When compare match E occurs in channel 0
1: When TCNT_0 is cleared
Timing Select B
Specifies the timing for transferring data from TGRD to
TGRB in each channel when they are used together for
buffer operation.
Do not set this bit to 1 when the channel is to be used
in a mode other than PWM mode.
0: When compare match B occurs in each channel
1: When TCNT is cleared in each channel
—
R
5
0
—
R
4
0
—
R
3
0
Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
TTSE TTSB TTSA
R/W
2
0
R/W
1
0
R/W
0
0
Page 419 of 1190
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