R0K572011S000BE Renesas Electronics America, R0K572011S000BE Datasheet - Page 1211
R0K572011S000BE
Manufacturer Part Number
R0K572011S000BE
Description
KIT STARTER FOR SH7201
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets
1.R0K572011S000BE.pdf
(1222 pages)
2.R0K572011S000BE.pdf
(7 pages)
3.R0K572011S000BE.pdf
(5 pages)
Specifications of R0K572011S000BE
Contents
CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
For Use With/related Products
SH7201
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 1211 of 1222
- Download datasheet (8Mb)
SH7201 Group
Numerics
16-bit counter mode................................ 617
16-bit/32-bit displacement ........................ 29
8-bit timers (TMR) ................................. 599
A
A/D conversion time
(multi mode and scan mode)................... 896
A/D conversion time (single mode) ........ 895
A/D conversion timing ........................... 895
A/D converter (ADC) ............................. 877
A/D converter activation......................... 534
A/D converter characteristics................ 1151
A/D converter start request
delaying function .................................... 524
A/D trigger input timing ....................... 1146
Absolute address....................................... 29
Absolute address accessing....................... 29
Absolute maximum ratings................... 1107
AC characteristics................................. 1116
AC characteristics measurement
conditions.............................................. 1150
Address array.................................. 182, 194
Address array read .................................. 194
Address errors......................................... 101
Address map ........................................... 203
Address map for each mailbox ............... 817
Address-array write
(associative operation) ............................ 195
Address-array write
(non-associative operation)..................... 195
Addressing modes..................................... 30
Advanced User Debugger II (AUD-II) . 1027
Analog input pin ratings ......................... 901
Arithmetic operation instructions ............. 48
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Index
B
Bit manipulation instructions .................... 59
Bit synchronous circuit ........................... 767
Block diagram............................................. 9
Branch instructions ................................... 53
Break detection and processing............... 727
Break on data access cycle...................... 175
Break on instruction fetch cycle.............. 174
Bus state controller (BSC) ...................... 199
Bus timing............................................. 1122
C
Cache ...................................................... 181
Calculating exception handling
vector table addresses................................ 96
CAN interface ......................................... 815
CAN sleep mode ..................................... 861
Canceling software standby mode .......... 633
Cascaded connection............................... 617
Changing the division ratio ....................... 88
Changing the frequency .................... 87, 633
Changing the multiplication rate............... 87
Clock frequency control circuit................. 75
Clock operating modes.............................. 77
Clock pulse generator (CPG) .................... 73
Clock timing ......................................... 1116
Clocked synchronous serial format ......... 757
Coherency of cache and
external memory ..................................... 194
Compare match count mode ................... 617
Compare match signal............................. 614
Complementary PWM mode .................. 487
Control signal timing ............................ 1120
Controller area network (RCAN-ET)...... 811
CPU........................................................... 19
Crystal oscillator ....................................... 75
Page 1183 of 1190
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