AT91RM3400-DK Atmel, AT91RM3400-DK Datasheet - Page 8
AT91RM3400-DK
Manufacturer Part Number
AT91RM3400-DK
Description
KIT DEV FOR AT91RM3400
Manufacturer
Atmel
Series
AT91SAM Smart ARMr
Type
MCUr
Datasheets
1.AT91RM3400-DK.pdf
(461 pages)
2.AT91RM3400-DK.pdf
(2 pages)
3.AT91RM3400-DK.pdf
(25 pages)
Specifications of AT91RM3400-DK
Contents
Evaluation Board, Software and Documentation
Processor To Be Evaluated
AT91RM3400
Data Bus Width
32 bit
Interface Type
RS-232, USB
For Use With/related Products
AT91RM3400
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 8 of 461
- Download datasheet (6Mb)
Two-wire Interface
USART
Serial Synchronous
Controller
Timer Counter
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AT91RM3400
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Compatibility with standard two-wire serial memory
One, two or three bytes for slave address
Sequential read/write operations
Programmable Baud Rate Generator
5- to 9-bit Full-duplex Synchronous or Asynchronous Serial Communications
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RS485 with driver control signal
ISO7816, T = 0 or T = 1 Protocols for Interfacing with Smart Cards
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IrDA Modulation and Demodulation
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Test Modes
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Supports Connection of Two Peripheral Data Controller Channels (PDC)
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Provides Serial Synchronous Communication Links Used in Audio and Telecom
Applications
Contains an Independent Receiver and Transmitter and a Common Clock Divider
Interfaced with Two PDC Channels (DMA Access) to Reduce Processor Overhead
Offers a Configurable Frame Sync and Data Length
Receiver and Transmitter can be Programmed to Start Automatically or on Detection
of Different Event on the Frame Sync Signal
Receiver and Transmitter Include a Data Signal, a Clock Signal and a Frame
Synchronization Signal
Three 16-bit Timer Counter Channels
A Wide Range of Functions Including:
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1, 1.5 or 2 Stop Bits in Asynchronous Mode or 1 or 2 Stop Bits in
Synchronous Mode
Parity Generation and Error Detection
Framing Error Detection, Overrun Error Detection
MSB- or LSB-first
Optional Break Generation and Detection
By 8 or by-16 Over-sampling Receiver Frequency
Optional Hardware Handshaking RTS-CTS
Optional Modem Signal Management DTR-DSR-DCD-RI
Receiver Time-out and Transmitter Timeguard
Optional Multi-Drop Mode with Address Generation and Detection
NACK Handling, Error Counter with Repetition and Iteration Limit
Communication at up to 115.2 Kbps
Remote Loopback, Local Loopback, Automatic Echo
Offers Buffer Transfer without Processor Intervention
Frequency Measurement
Event Counting
Interval Measurement
Pulse Generation
Delay Timing
1790A–ATARM–11/03
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