ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 890
ATSAM3U-EK
Manufacturer Part Number
ATSAM3U-EK
Description
KIT EVAL FOR AT91SAM3U CORTEX
Manufacturer
Atmel
Type
MCUr
Datasheets
1.ATSAM3U-EK.pdf
(2 pages)
2.ATSAM3U-EK.pdf
(61 pages)
3.ATSAM3U-EK.pdf
(1171 pages)
4.ATSAM3U-EK.pdf
(53 pages)
Specifications of ATSAM3U-EK
Contents
Board
Processor To Be Evaluated
SAM3U
Data Bus Width
32 bit
Interface Type
RS-232, USB
Operating Supply Voltage
3 V
Silicon Manufacturer
Atmel
Core Architecture
ARM
Core Sub-architecture
Cortex - M3
Silicon Core Number
SAM3U4E
Silicon Family Name
SAM3U
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT91SAM3U
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATSAM3U-EK
Manufacturer:
Atmel
Quantity:
10
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38.6.5.4
890
890
SAM3U Series
SAM3U Series
Changing the Synchronous Channels Update Period
It is possible to change the update period of synchronous channels while they are enabled. (See
“Method 2: Manual write of duty-cycle values and automatic trigger of the update” on page 879
and
page
To prevent an unexpected update of the synchronous channels registers, the user must use the
“PWM Sync Channels Update Period Update Register”
update period of synchronous channels while they are still enabled. This register holds the new
value until the end of the update period of synchronous channels (when UPRCNT is equal to
UPR in
rent PWM period, then updates the value for the next period.
Note:
Note:
Figure 38-17. Synchronized Update of Update Period Value of Synchronous Channels
“Method 3: Automatic write of duty-cycle values and automatic trigger of the update” on
881.)
“PWM Sync Channels Update Period Register”
If the update register PWM_SCUPUPD is written several times between two updates, only the last
written value is taken into account.
Changing the update period does make sense only if there is one or more synchronous channels
and if the update method 1 or 2 is selected (UPDM = 1 or 2 in
Register”).
End of PWM period and
end of Update Period
of Synchronous Channels
PWM_SCUPUPD Value
User's Writing
PWM_SCUP
(PWM_SCUP)) and the end of the cur-
(PWM_SCUPUPD) to change the
“PWM Sync Channels Mode
6430D–ATARM–25-Mar-11
6430D–ATARM–25-Mar-11
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