TC1016/17EV Microchip Technology, TC1016/17EV Datasheet - Page 9
![BOARD DEMO FOR TC1016/TC1017](/photos/9/16/91692/mfg_tc1016_17ev_sml.jpg)
TC1016/17EV
Manufacturer Part Number
TC1016/17EV
Description
BOARD DEMO FOR TC1016/TC1017
Manufacturer
Microchip Technology
Specifications of TC1016/17EV
Design Resources
TC1016/17EV Gerber Files
Channels Per Ic
1 - Single
Voltage - Output
1.8V, 3V
Current - Output
150mA, 150mA
Voltage - Input
2.7 ~ 6V
Regulator Type
Positive Fixed
Operating Temperature
-40°C ~ 125°C
Board Type
Fully Populated
Utilized Ic / Part
TC1016, TC1017
Processor To Be Evaluated
TC1016 and TC1017
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
3.0
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
3.1
The regulator is fully enabled when a logic-high is
applied to SHDN. The regulator enters shutdown when
a logic-low is applied to this input. During shutdown, the
output voltage falls to zero and the supply current is
reduced to 0.05 µA (typ.)
3.2
For best performance, it is recommended that the
ground pin be tied to a ground plane.
© 2005 Microchip Technology Inc.
5-Pin SC-70
Pin No.
1
2
3
4
5
PIN DESCRIPTIONS
Shutdown Control Input (SHDN)
Ground Terminal
PIN FUNCTION TABLE
5-Pin SC-70R
5-Pin SOT-23
Pin No.
3
4
2
5
1
Symbol
SHDN
V
GND
V
NC
OUT
IN
Shutdown Control Input
No Connect
Ground Terminal
Regulated Voltage Output
Unregulated Supply Input
3.3
Bypass the regulated voltage output to GND with a
minimum capacitance of 1 µF. A ceramic bypass
capacitor is recommended for best performance.
3.4
The minimum V
to ensure that the output maintains regulation:
V
maximum V
Power dissipation may limit V
order to maintain a junction temperature below 125°C.
Refer to Section 5.0 “Thermal Considerations”, for
determining junction temperature.
It is recommended that V
ceramic capacitor.
IN
2.7V and V
Regulated Voltage Output (V
Unregulated Supply Input (V
IN
should be less than or equal to 6V.
IN
Description
IN
has to meet two conditions in order
[(V
R
IN
+ 2.5%) + V
be bypassed to GND with a
IN
to a lower potential in
TC1017
DS21813D-page 9
DROPOUT
OUT
IN
]. The
)
)