SERDESUR-43USB/NOPB National Semiconductor, SERDESUR-43USB/NOPB Datasheet - Page 7

• Manufacturer Part Number: SERDESUR-43USB/NOPB
• Description: BOARD EVAL DS90UR124,DS90UR241
• Manufacturer: National Semiconductor

Specifications of SERDESUR-43USB/NOPB

• Main Purpose: Interface, Serializer, Deserializer (SERDES)
• Utilized Ic / Part: DS90UR241, DS90UR124
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Other names: SERDESUR-43USB

Note:
VDD and VSS MUST
be applied externally
from here.
J1
S1
SERDES Serializer Board Description:
The 50-pin IDC connector J1 accepts 24 bits of LVCMOS RGB data (DIN0-DIN23)
along with the clock input (TCLK).
The SERDES serializer board is powered externally from the J4 (VDD) and J5 (VSS)
connectors shown below. For the serializer to be operational, the Power Down (S1-
TPWDNB) and Data Enable (S1-DEN) switches on S1 must be set HIGH. Rising or
falling edge reference clock is also selected on S1-TRFB: HIGH (rising) or LOW
(falling). FPD_LINKII is an AC coupled LVDS (series 0.1µF capacitors on each side of
the LVDS serializer outputs and de-serializer inputs). JP1 and JP2 are configured from
the factory to be shorted to VSS; these are the unused power wires in the cable
harness.
The USB connector P2 (on the backside of the board) provides the interface connection
to the LVDS signals to the de-serializer board.
J4, J5
SERDES Evaluation Kit DS90UR241/124 USB Version 0.1 User Manual
National Semiconductor Corporation
Date: 5/8/2008
Page 7 of 36
(For 50
resistors to provide proper termination.)
LVDS OUTPUTS
LVCMOS INPUTS
FUNCTION CONTROLS
POWER SUPPLY
50Ω INPUT TERMINATION
UNUSED POWER WIRES IN CABLE
Ω
signal sources, populated with 50ohm
Note:
Connect cable
(USB A side)
to P2 on BACKSIDE.
(UNSTUFFED)
JP1, JP2
P2 (BACKSIDE)
P1 (TOPSIDE)
VR1, JP3