RDK-128 Power Integrations, RDK-128 Datasheet - Page 12
![KIT REF DESIGN 36-72W MOTOR DRVR](/photos/9/8/90814/rdk-128_sml.jpg)
RDK-128
Manufacturer Part Number
RDK-128
Description
KIT REF DESIGN 36-72W MOTOR DRVR
Manufacturer
Power Integrations
Specifications of RDK-128
Main Purpose
Power Management, Motor Control
Embedded
No
Utilized Ic / Part
PKS606
Primary Attributes
Variable Speed 12V 36W DC Motor, 90 ~ 265 VAC
Secondary Attributes
External Potentiometer or Variable DC Voltage Speed Control
Lead Free Status / RoHS Status
Not applicable / Not applicable
Other names
596-1198
Thermal Considerations
For the P package, the four SOURCE pins are internally
connected to the IC lead frame and provide the main path to
remove heat from the device. Therefore, all the SOURCE pins
should be connected to a copper area underneath the PeakSwitch
to act not only as a single point ground, but also as a heatsink.
As this area is connected to the quiet source node, it should be
maximized for good heatsinking. Similarly, for axial output
diodes, maximize the PCB area connected to the cathode.
Y-Capacitor
The placement of the Y-type cap should be directly from the
primary input filter capacitor positive terminal to the common/
return terminal of the transformer secondary. If a second
Y- type cap is required from primary to secondary return, connect
the primary side directly to the negative terminal of the input
capacitor. Such a placement will route high magnitude common
mode surge currents away from the PeakSwitch device. Note
– if an input π (C, L, C) EMI filter is used, then the inductor in
the filter should be placed between the negative terminals on
the input filter capacitors.
Optocoupler
Place the optocoupler physically close to the PeakSwitch to
minimize the primary side trace lengths. Keep the high current
high voltage drain and clamp traces away from the optocoupler
to prevent noise pick up.
Output Diode
For best performance, the area of the loop connecting the
secondary winding, the output diode and the output filter
capacitor should be minimized. In addition, sufficient copper
area should be provided at the anode and cathode terminal
of the diode for heatsinking. A larger area is preferred at the
quite cathode terminal. A large anode area can increase high
frequency radiated EMI.
Rev. I 02/07
12
PKS603-607
Quick Design Checklist
As with any power supply design, all PeakSwitch designs
should be verified on the bench to make sure that component
specifications are not exceeded under worst case conditions. The
following minimum set of tests is strongly recommended:
1. Maximum drain voltage – Verify that the V
2. Maximum drain currents – Verify the simultaneous drain
3. Maximum drain current – A t maximum ambient temperature,
4. Thermal Check – At specified maximum output power,
Design Tools
Up-to-date information on design tools can be found at the
Power Integrations web site: www.powerint.com.
650 V at highest input voltage and peak (overload) output
power. The 50 V margin to the 700 V BV
allows margin for design variation.
voltage and current levels are within the curve provided in
Figure 29 under worst case conditions. Typically this occurs
at start up (and during an output short circuit), highest input
line voltage and maximum ambient temperature. When
making this measurement using a current probe, to monitor
the drain current, ensure the results are corrected for the
10-20 ns current probe delay.
maximum input voltage and peak output (overload) power,
verify drain current waveforms show no signs of transformer
saturation. If the transformer shows signs of saturation,
it should be redesigned with a lower flux density, or a
higher quality core material should be used. To prevent
false triggering of the current limit, verify the leading
edge current spike event is below I
t
should be below the absolute maximum limit specified in
the Absolute Maximum Ratings section.
minimum input voltage and maximum ambient temperature,
verify that the temperature specifications are not exceeded for
PeakSwitch, transformer, output diode and output capacitors.
Enough thermal margin should be allowed for part-to-part
variation of the R
data sheet. Under low line, maximum power, a maximum
PeakSwitch SOURCE pin or tab temperature of 110 °C is
recommended to allow for these variations.
LEB(MIN)
. Under all conditions, the maximum drain current
DS(ON)
of PeakSwitch as specified in the
INIT(MIN)
DS
at the end of the
DSS
does not exceed
specification