LFDAS12XSCT Freescale Semiconductor, LFDAS12XSCT Datasheet - Page 572
LFDAS12XSCT
Manufacturer Part Number
LFDAS12XSCT
Description
HARDWARE MC9S12XS 48-PIN
Manufacturer
Freescale Semiconductor
Datasheet
1.LFDAS12XSCT.pdf
(738 pages)
Specifications of LFDAS12XSCT
Module/board Type
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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128 KByte Flash Module (S12XFTMR128K1V1)
All assigned bits in the FERCNFG register are readable and writable.
19.3.2.7
The FSTAT register reports the operational status of the Flash module.
1
CCIF, ACCERR, and FPVIOL bits are readable and writable, MGBUSY and MGSTAT bits are readable
but not writable, while remaining bits read 0 and are not writable.
572
Reset value can deviate from the value shown if a double bit fault is detected during the reset sequence (see
Offset Module Base + 0x0005
Offset Module Base + 0x0006
Reset
DFDIE
Reset
SFDIE
Field
1
0
W
W
R
R
CCIF
Double Bit Fault Detect Interrupt Enable — The DFDIE bit controls interrupt generation when a double bit fault
is detected during a Flash block read operation.
0 DFDIF interrupt disabled
1 An interrupt will be requested whenever the DFDIF flag is set (see
Single Bit Fault Detect Interrupt Enable — The SFDIE bit controls interrupt generation when a single bit fault
is detected during a Flash block read operation.
0 SFDIF interrupt disabled whenever the SFDIF flag is set (see
1 An interrupt will be requested whenever the SFDIF flag is set (see
Flash Status Register (FSTAT)
0
1
7
7
= Unimplemented or Reserved
= Unimplemented or Reserved
Figure 19-10. Flash Error Configuration Register (FERCNFG)
0
0
0
6
6
Figure 19-11. Flash Status Register (FSTAT)
Table 19-14. FERCNFG Field Descriptions
S12XS Family Reference Manual, Rev. 1.11
ACCERR
0
0
0
5
5
FPVIOL
0
0
4
4
Description
MGBUSY
0
0
3
3
Section
Section
Section
RSVD
19.3.2.8)
0
0
2
2
19.3.2.8)
19.3.2.8)
Freescale Semiconductor
DFDIE
0
0
1
1
1
MGSTAT[1:0]
Section
SFDIE
0
0
0
0
1
19.6).
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