AB1 Silicon Laboratories Inc, AB1 Datasheet

DAUGHTERCARD ETHERNET F124/020TB

AB1

Manufacturer Part Number
AB1
Description
DAUGHTERCARD ETHERNET F124/020TB
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of AB1

Accessory Type
Daughter Board
Processor To Be Evaluated
C8051Fx
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F020-TB, C8051F040-TB, C8051F060-TB and C8051F120-TB
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q1476424

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AB1 P
1.0. Summary
The AB1 prototyping board provides a 3 x 3.75" prototyping area (0.1" center through-hole) with access to all MCU
I/O signals. Access to I/O signals is provided by a 96-pin, high density connector that mates directly to the expan-
sion connector of C8051F020-TB, C8051F040-TB, C8051F060-TB, and C8051F120-TB target boards. A 128 kB
SRAM is installed on the board which can be connected to the MCU's External Memory Interface by installing a
single 2-pin jumper (included).
2.0 Features
3.0 SRAM Details
The IDT71V124SA12PH is a high-speed with 12 nanosecond access and cycle time static SRAM. For more further
information on access and cycle times for this SRAM please refer to the IDT71V124 data sheet available at
www.idt.com/docs/71V124SA_DS_30147.pdf. To enable the SRAM jumper J1 must be installed and the /CS
Chip Select pin must be pulled low. The SRAM utilizes the External Memory Interface from F02X and later
devices, more information on using this interface can be found in Section 16 of the C8051F02x Data Sheet. When
enabled the SRAM uses ports 5, 6, and 7 and the upper nibble of port 4. The pin-out is as follows:
Rev. 0.3 1/04
96 pin 3 row connector
128 kB SRAM Part number IDT71V124
SRAM disable jumper J1(open = disabled , closed = enabled )
Duplicate of connector pins for easy access to signals
Digital and analog supply and ground rails
Signal Name
I/O0…I/O7
A8...A15
A0…A7
GND
VDD
/WE
A16
/CS
/OE
R O T O T Y P I N G
17,18,19,20,21,29,30,31
6,7,10,11,22,23,26,27
1,2,3,4,13,14,15,16
SRAM Pin(s)
Copyright © 2004 by Silicon Laboratories
B
O A R D
8,24
9,25
12
28
32
5
U
S E R
P4.4(J1 closed)
C8051F02XTB
S
Connection
P7.0…P7.7
P6.0…P6.7
P5.0…P5.7
+3 VD
G
GND
P4.7
P4.6
P4.5
U I D E
Address Bus High Byte
Address Bus Low Byte
Output Enable
Digital Ground
Digital Power
Write Enable
AN171
Description
Bank Select
Chip Select
Data Bus
AN171
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AB1 Summary of contents

Page 1

... 1.0. Summary The AB1 prototyping board provides 3.75" prototyping area (0.1" center through-hole) with access to all MCU I/O signals. Access to I/O signals is provided by a 96-pin, high density connector that mates directly to the expan- sion connector of C8051F020-TB, C8051F040-TB, C8051F060-TB, and C8051F120-TB target boards. A 128 kB SRAM is installed on the board which can be connected to the MCU's External Memory Interface by installing a single 2-pin jumper (included) ...

Page 2

AN171 4.0 Hardware Setup A compatible target board is connected to the accessory board as shown in Figure 1. AC/DC Adapter 2 Accessory Board Target Board Figure 1. Hardware Setup Rev. 0.3 ...

Page 3

Notes: Rev. 0.3 AN171 3 ...

Page 4

... Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized ap- plication, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages. Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. ...

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