HYS72T128000HR-3S-B Qimonda, HYS72T128000HR-3S-B Datasheet

MODULE DDR2 1GB 240-DIMM

HYS72T128000HR-3S-B

Manufacturer Part Number
HYS72T128000HR-3S-B
Description
MODULE DDR2 1GB 240-DIMM
Manufacturer
Qimonda
Datasheet

Specifications of HYS72T128000HR-3S-B

Memory Type
DDR2 SDRAM
Memory Size
1GB
Speed
333MHz
Package / Case
240-DIMM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
675-1028
January 2007
H Y S 7 2 T 6 4 0 0 0 H R – [ 3 S / 3 . 7 / 5 ] – B
H Y S 7 2 T 1 2 8 0 x 0 H R – [ 3 S / 3 . 7 / 5 ] – B
H Y S 7 2 T 2 5 6 2 2 0 H R – [ 3 S / 3 . 7 / 5 ] – B
2 4 0 - P i n R e g i s t e r e d D D R 2 S D R A M M o d u l e s
R D I M M S D R A M
D D R 2 S D R A M
R o H S C o m p l i a n t
I n t e r n e t D a t a S h e e t
R e v . 1 . 2

Related parts for HYS72T128000HR-3S-B

HYS72T128000HR-3S-B Summary of contents

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... HYS72T64000HR–[3S/3.7/5]–B, HYS72T1280x0HR–[3S/3.7/5]–B, HYS72T256220HR–[3S/3.7/5]–B Revision History: 2007-01, Rev. 1.2 Page Subjects (major changes since last revision) All Adapted internet edition All Added Product Type HYS72T64000HR-3S-B, HYS72T128000HR-3S-B, HYS72T128020HR-3S-B and HYS72T256220HR-3S-B Previous Revision: 2006-09, Rev. 1.11 All Qimonda update Previous Revision: 2006-03, Rev. 1.1 5 ...

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... Overview This chapter gives an overview of the 1.8 V 240-Pin Registered DDR2 SDRAM Modules product family and describes its main characteristics. 1.1 Features • 240-Pin PC2–5300, PC2–4200 and PC2–3200 DDR2 SDRAM memory modules for PC, Workstation and Server main memory applications • ...

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... GB 2Rx8 PC2-4200R-444-12-B0 HYS72T256220HR–3.7– 2Rx4 PC2-4200R-444-12-J1 PC2–3200 HYS72T64000HR–5–B 512 MB 1Rx8 PC2-3200R-333-12-A0 HYS72T128000HR–5– 1Rx4 PC2-3200R-333-12-C0 HYS72T128020HR–5– 2Rx8 PC2-3200R-333-12-B0 HYS72T256220HR–5– 2Rx4 PC2-3200R-333-12-J1 1) All Product Type numbers end with a place code, designating the silicon die revision. Example: HYS72T64000HR–3.7–B, indicating Rev. ...

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... GB 2 256M × Product Type DRAM Components HYS72T64000HR HYB18T512800BF HYS72T128000HR HYB18T512400BF HYS72T128020HR HYB18T512800BF HYS72T256220HR HYB18T512400BF 1) Green Product 2) For a detailed description of all functionalities of the DRAM components on these modules see the component data sheet. Rev. 1.2, 2007-01 03292006-JXZQ-CG6T HYS72T[64/128/256]xxxHR–[3S/3.7/5]–B ...

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Pin Configuration This chapter describes the pin configuration. 2.1 Pin Configuration The pin configuration of the Registered DDR2 SDRAM DIMM is listed by function in Table 5 (240 pins). The abbreviations used in columns Pin and Buffer Type are ...

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... SSTL SSTL SSTL SSTL SSTL SSTL Address Signal 13 — Not Connected Note: Non CA parity modules based on 256 Mbit component SSTL Address Signal 14 Note: CA Parity module — Not Connected Note: Non CA parity module. Less than 1 GBit per DRAM die. SSTL Address Signal 14 Note: CA Parity module — ...

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Ball No. Name Pin Type Data Signals 3 DQ0 I/O 4 DQ1 I/O 9 DQ2 I/O 10 DQ3 I/O 122 DQ4 I/O 123 DQ5 I/O 128 DQ6 I/O 129 DQ7 I/O 12 DQ8 I/O 13 DQ9 I/O 21 DQ10 I/O ...

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Ball No. Name Pin Type 206 DQ39 I/O 89 DQ40 I/O 90 DQ41 I/O 95 DQ42 I/O 96 DQ43 I/O 208 DQ44 I/O 209 DQ45 I/O 214 DQ46 I/O 215 DQ47 I/O 98 DQ48 I/O 99 DQ49 I/O 107 DQ50 ...

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Ball No. Name Pin Type Data Strobe Bus 7 DQS0 I/O 6 DQS0 I/O 16 DQS1 I/O 15 DQS1 I/O 28 DQS2 I/O 27 DQS2 I/O 37 DQS3 I/O 36 DQS3 I/O 84 DQS4 I/O 83 DQS4 I/O 93 DQS5 ...

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Ball No. Name Pin Type Data Mask 125 DM0 I 134 DM1 I 146 DM2 I 155 DM3 I 202 DM4 I 211 DM5 I 223 DM6 I 232 DM7 I 164 DM8 I EEPROM 120 SCL I 119 SDA ...

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... Not connected SSTL On-Die Termination Control 1:0 Note: 2-Ranks module SSTL — Note: 1-Rank modules Description Serial Stub Terminated Logic (SSTL_18) CMOS Levels Open Drain. The corresponding pin has 2 operational states, active low and tristate, and allows multiple devices to share as a wire-OR. ...

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Rev. 1.2, 2007-01 03292006-JXZQ-CG6T HYS72T[64/128/256]xxxHR–[3S/3.7/5]–B 240-Pin Registered DDR2 SDRAM Pin Configuration for RDIMM (240 pins) 13 Internet Data Sheet FIGURE 1 ...

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Electrical Characteristics This chapter describes the electrical characteristics. 3.1 Absolute Maximum Ratings Caution is needed not to exceed absolute maximum ratings of the DRAM device listed in Symbol Parameter V V Voltage on pin relative ...

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DC Characteristics This chapter describes the DC characteristics. Parameter Symbol V Device Supply Voltage DD V Output Supply Voltage DDQ V Input Reference Voltage REF V SPD Supply Voltage DDSPD V DC Input Logic High IH(DC Input ...

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Timing Characteristics This chapter contains the AC characteristics. 3.3.1 Speed Grade Definitions All Speed grades faster than DDR2-400B comply with DDR2-400B timing specifications( Speed Grade QAG Sort Name CAS-RCD-RP latencies Parameter Symbol t Clock Frequency @ ...

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Component AC Timing Parameters List of AC timing parameter tables. • Table 13 “DRAM Component Timing Parameter by Speed Grade - DDR2–667” on Page 17 • Table 14 “DRAM Component Timing Parameter by Speed Grade - DDR2–533” on Page ...

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... Exit precharge power-down to any valid command (other than NOP or Deselect) Exit self-refresh to a non-read command Exit self-refresh to read command Write command to DQS associated clock edges 1) For details and notes see the relevant Qimonda component data sheet 1.8 V ± 0.1V; = 1.8 V ± 0.1 V. See notes ...

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DAL = WR + RU{ (ns) / (ns)}, where RU stands for round up. WR refers to the tWR parameter stored in the MRS. For the division is not already an integer, round up ...

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Rev. 1.2, 2007-01 03292006-JXZQ-CG6T HYS72T[64/128/256]xxxHR–[3S/3.7/5]–B 240-Pin Registered DDR2 SDRAM Method for calculating transitions and endpoint Differential input waveform timing - Differential input waveform timing - 20 Internet Data Sheet FIGURE 2 FIGURE and DS DS FIGURE 4 ...

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Parameter DQ output access time from CAS A to CAS B command period CK, CK high-level width CKE minimum high and low pulse width CK, CK low-level width Auto-Precharge write recovery + precharge time Minimum time clocks ...

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... Exit precharge power-down to any valid command (other than NOP or Deselect) Exit Self-Refresh to non-Read command Exit Self-Refresh to Read command Write recovery time for write with Auto- Precharge 1) For details and notes see the relevant Qimonda component data sheet = 1.8 V ± 0 1.8 V ±0.1 V. See notes ...

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The , and , parameters are referenced to a specific voltage level, which specify when the device output is no longer driving HZ RPST LZ RPRE begins ...

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Parameter DQS falling edge hold time from CK (write cycle) DQS falling edge to CK setup time (write cycle) Clock half period Data-out high-impedance time from Address and control input hold time Address and control input pulse ...

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... Parameter Exit Self-Refresh to Read command Write recovery time for write with Auto- Precharge 1) For details and notes see the relevant Qimonda component data sheet V = 1.8 V ± 0 1.8 V ±0.1 V. See notes 2) DDQ DD 3) Timing that is not specified is illegal and after such an event, in order to guarantee proper operation, the DRAM must be powered down and then restarted through the specified initialization sequence before normal operation can continue ...

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ODT AC Electrical Characteristics This chapter describes the ODT AC electrical characteristics. Symbol Parameter / Condition t ODT turn-on delay AOND t ODT turn-on AON t ODT turn-on (Power-Down Modes) AONPD t ODT turn-off delay AOFD t ODT turn-off ...

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ODT turn off time min. is when the device starts to turn off ODT resistance. ODT turn off time max is when the bus is in high impedance. t Both are measured from . Both are measured from AOFD ...

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... Definitions for see Table For two rank modules: for all active current measurements the other rank is in Precharge Power-Down Mode 5) For details and notes see the relevant Qimonda component data sheet and current measurements are defined with the outputs disabled ( ...

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Product Type Organization 512 MB 1 Rank ×72 -3S Symbol Max. I 1020 DD0 I 1150 DD1 I 450 DD2P I 790 DD2N I 750 DD2Q I 680 DD3P( MRS = 0) I 470 DD3P( MRS = 1) I 840 ...

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Product Type Organization 512 MB 1 Rank ×72 -3.7 Symbol Max. I 920 DD0 I 1010 DD1 I 390 DD2P I 670 DD2N I 650 DD2Q I 580 DD3P( MRS = 0) I 410 DD3P( MRS = 1) I 720 ...

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Product Type Organization 512 MB 1 Rank ×72 -5 Symbol Max. I 820 DD0 I 910 DD1 I 340 DD2P I 580 DD2N I 560 DD2Q I 490 DD3P( MRS = 0) I 360 DD3P( MRS = 1) I 630 ...

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SPD Codes This chapter lists all hexadecimal byte values stored in the EEPROM of the products described in this data sheet. SPD stands for serial presence detect. All values with XX in the table are module specific bytes which ...

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Product Type Organization Label Code JEDEC SPD Revision Byte# Description 13 Primary SDRAM Width 14 Error Checking SDRAM Width 15 Not used 16 Burst Length Supported 17 Number of Banks on SDRAM Device 18 Supported CAS Latencies 19 DIMM Mechanical ...

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Product Type Organization Label Code JEDEC SPD Revision Byte# Description 39 Analysis Characteristics and Extension RC RFC t 41 [ns] RC.MIN t 42 [ns] RFC.MIN t 43 [ns] CK.MAX t 44 [ns] DQSQ.MAX t 45 [ns] QHS.MAX ...

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Product Type Organization Label Code JEDEC SPD Revision Byte# Description 65 Manufacturer’s JEDEC ID Code (2) 66 Manufacturer’s JEDEC ID Code (3) 67 Manufacturer’s JEDEC ID Code (4) 68 Manufacturer’s JEDEC ID Code (5) 69 Manufacturer’s JEDEC ID Code (6) ...

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Product Type Organization Label Code JEDEC SPD Revision Byte# Description 91 Module Revision Code 92 Test Program Revision Code 93 Module Manufacturing Date Year 94 Module Manufacturing Date Week Module Serial Number 99 - 127 Not used ...

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Product Type Organization Label Code JEDEC SPD Revision Byte# Description 0 Programmed SPD Bytes in EEPROM 1 Total number of Bytes in EEPROM 2 Memory Type (DDR2) 3 Number of Row Addresses 4 Number of Column Addresses 5 DIMM Rank ...

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Product Type Organization Label Code JEDEC SPD Revision Byte# Description (Byte 18) [ns] CK MAX SDRAM @ -1 [ns] AC MAX (Byte 18) [ns] CK MAX t ...

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Product Type Organization Label Code JEDEC SPD Revision Byte# Description ∆ (DT0) 0 ∆ (DT2N, UDIMM) or ∆ ∆ (DT2P) 2P ∆ (DT3N) 3N ∆ (DT3P fast) ...

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Product Type Organization Label Code JEDEC SPD Revision Byte# Description 75 Product Type, Char 3 76 Product Type, Char 4 77 Product Type, Char 5 78 Product Type, Char 6 79 Product Type, Char 7 80 Product Type, Char 8 ...

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Product Type Organization Label Code JEDEC SPD Revision Byte# Description 0 Programmed SPD Bytes in EEPROM 1 Total number of Bytes in EEPROM 2 Memory Type (DDR2) 3 Number of Row Addresses 4 Number of Column Addresses 5 DIMM Rank ...

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Product Type Organization Label Code JEDEC SPD Revision Byte# Description (Byte 18) [ns] CK MAX SDRAM @ -1 [ns] AC MAX (Byte 18) [ns] CK MAX t ...

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Product Type Organization Label Code JEDEC SPD Revision Byte# Description ∆ (DT0) 0 ∆ T (DT2N, UDIMM) or ∆ ∆ (DT2P) 2P ∆ (DT3N) 3N ∆ (DT3P fast) ...

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Product Type Organization Label Code JEDEC SPD Revision Byte# Description 75 Product Type, Char 3 76 Product Type, Char 4 77 Product Type, Char 5 78 Product Type, Char 6 79 Product Type, Char 7 80 Product Type, Char 8 ...

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Package Outlines This chapter contains the package outlines. Notes 1. Drawing according to ISO 8015 2. Dimensions General tolerances +/- 0.15 Rev. 1.2, 2007-01 03292006-JXZQ-CG6T HYS72T[64/128/256]xxxHR–[3S/3.7/5]–B 240-Pin Registered DDR2 SDRAM Package Outline Raw Card A L-DIM-240-11 ...

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Notes 1. Drawing according to ISO 8015 2. Dimensions General tolerances +/- 0.15 Rev. 1.2, 2007-01 03292006-JXZQ-CG6T HYS72T[64/128/256]xxxHR–[3S/3.7/5]–B 240-Pin Registered DDR2 SDRAM Package Outline Raw Card C L-DIM-240-13 46 Internet Data Sheet FIGURE 6 ...

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Notes 1. Drawing according to ISO 8015 2. Dimensions General tolerances +/- 0.15 Rev. 1.2, 2007-01 03292006-JXZQ-CG6T HYS72T[64/128/256]xxxHR–[3S/3.7/5]–B 240-Pin Registered DDR2 SDRAM Package Outline Raw Card B L-DIM-240-12 47 Internet Data Sheet FIGURE 7 ...

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Notes 1. Drawing according to ISO 8015 2. Dimensions General tolerances +/- 0.15 Rev. 1.2, 2007-01 03292006-JXZQ-CG6T HYS72T[64/128/256]xxxHR–[3S/3.7/5]–B 240-Pin Registered DDR2 SDRAM Package Outline Raw Card J L-DIM-240-20 48 Internet Data Sheet FIGURE 8 ...

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... Product Type Nomenclature Qimonda’s nomenclature uses simple coding combined with some propriatory coding. Table 26 provides examples for module and component product type number as well as the Example for Field Number 1 2 Micro-DIMM HYS 64 DDR2 DRAM HYB 18 Field Description 1 Qimonda Module Prefix ...

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... Multiplying “Memory Density per I/O” with “Module Data Width” and dividing by 8 for Non-ECC and 9 for ECC modules gives the overall module memory density in MBytes as listed in column “Coding”. Field Description 1 Qimonda Component Prefix 2 Interface Voltage [V] 3 DRAM Technology ...

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Table of Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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... Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Qimonda Office. Qimonda Components may only be used in life-support devices or systems with the express written approval of Qimonda failure of such components can reasonably be expected to cause the failure of that life-support device or system affect the safety or effectiveness of that device or system ...

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