ACPL-M60L-000E Avago Technologies US Inc., ACPL-M60L-000E Datasheet - Page 8
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ACPL-M60L-000E
Manufacturer Part Number
ACPL-M60L-000E
Description
OPTOCOUPLER 15MBD 3.3V 5-SOIC
Manufacturer
Avago Technologies US Inc.
Datasheet
1.ACPL-M60L-000E.pdf
(11 pages)
Specifications of ACPL-M60L-000E
Voltage - Isolation
3750Vrms
Number Of Channels
1, Unidirectional
Current - Output / Channel
50mA
Data Rate
15MBd
Propagation Delay High - Low @ If
50ns @ 7.5mA
Current - Dc Forward (if)
20mA
Input Type
DC
Output Type
Open Collector
Mounting Type
Surface Mount
Package / Case
5-SOP
No. Of Channels
1
Optocoupler Output Type
Logic Gate
Input Current
15mA
Output Voltage
7V
Opto Case Style
SOIC
No. Of Pins
5
Input Current Max
20mA
Isolation Voltage
3.75kV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ACPL-M60L-000E
Manufacturer:
AVAGO
Quantity:
9 000
Notes:
10. CM
11. For sinusoidal voltages, (|dV
12. Device considered a two terminal device: pins 1 and 3 shorted together, and pins 4, 5 and 6 shorted together.
13. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 V
Figure 1. Typical high level output current vs. temperature.
8
Parameter
Logic High
Common
Mode
Transient
Immunity
Logic Low
Common
Mode
Transient
Immunity
1. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not
2. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not
3. Derate linearly above +80˚C free-air temperature at a rate of 2.7 mW/˚C for the SOIC-5 package.
4. Bypassing of the power supply line is required, with a 0.1 µF ceramic disc capacitor adjacent to each optocoupler as illustrated in
5. The t
6. The t
7. t
8. See test circuit for measurement details.
9. CM
detection current limit, I
exceed 20 mA.
exceed 15 mA.
Figure 11. Total lead length between both ends of the capacitor and the isolator pins should not exceed 20 mm.
of the output pulse.
of the output pulse.
test conditions.
(i.e., V
(i.e., V
PSK
15
15
10
10
5
5
0
0
-60
-60
H
L
is equal to the worst case difference in t
is the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic state
PLH
PHL
is the maximum tolerable rate of rise on the common mode voltage to assure that the output will remain in a high logic state
o
o
> 2.0 V).
< 0.8 V).
-40
-40
propagation delay is measured from the 3.75 mA point on the falling edge of the input pulse to the 1.5 V point on the rising edge
propagation delay is measured from the 3.75 mA point on the rising edge of the input pulse to the 1.5 V point on the falling edge
-20
-20
T
A
Sym.
|CM
|CM
– TEMPERATURE – C
0
0
H
L
|
|
20
20
I-O
Device
ACPL-M60L
ACPL-M60L
40
40
≤ 5 µA).
CM
V
V
V
V
I
I
F
F
CC
CC
O
O
= 250 µA
= 250 µA
60
60
= 3.3 V
= 3.3 V
| / dt)
= 3.3 V
= 3.3 V
80
80
max
100
100
= πf
Min.
15,000
10,000
15,000
10,000
PHL
CM
V
and/or t
CM
15
10
Typ.
25,000
15,000
25,000
15,000
(p-p).
5
0
-60
PLH
-40
that will be seen between units at any given temperature and specified
-20
Units
V/µs
V/µs
T
A
- TEMPERATURE -
0
20
Test Conditions
|V
|V
CM
CM
4 0
V
V
I
| = 1000 V
| = 1000 V
F
CC
O
= 250 µA
60
°
= 5.5 V
C
= 5.5 V
8 0
100
V
V
R
V
V
R
V
V
R
V
V
R
CC
O(MIN)
L
CC
O(MIN)
L
CC
O(MAX)
L
CC
O(MIN)
L
= 350 Ω, T
= 350 Ω, T
= 350 Ω, T
= 350 Ω, T
= 3.3 V, I
= 5 V, I
= 3.3 V, I
= 5 V, I
= 2 V,
= 2 V,
= 0.8 V,
= 0.8 V,
F
F
= 0 mA,
= 7.5 mA,
F
F
A
A
A
A
= 0 mA,
= 7.5 mA,
= 25˚C
= 25˚C
= 25˚C
= 25˚C
RMS
for 1 second (Leakage
Fig.
9
9
9
9
Note
9, 11
9, 11
10, 11
10, 11