HCPL-060L-000E Avago Technologies US Inc., HCPL-060L-000E Datasheet - Page 13
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HCPL-060L-000E
Manufacturer Part Number
HCPL-060L-000E
Description
OPTOCOUPLER 15MBD 3.3V 8-SOIC
Manufacturer
Avago Technologies US Inc.
Datasheet
1.HCPL-060L-000E.pdf
(20 pages)
Specifications of HCPL-060L-000E
Package / Case
8-SOIC (0.154", 3.90mm Width)
Voltage - Isolation
3750Vrms
Number Of Channels
1, Unidirectional
Current - Output / Channel
50mA
Data Rate
15MBd
Propagation Delay High - Low @ If
50ns @ 7.5mA
Current - Dc Forward (if)
20mA
Input Type
DC
Output Type
Open Collector
Mounting Type
Surface Mount
Isolation Voltage
3750 Vrms
Maximum Continuous Output Current
50 mA
Maximum Fall Time
0.02 us
Maximum Forward Diode Current
20 mA
Minimum Forward Diode Voltage
1.4 V
Output Device
Logic Gate Photo IC
Configuration
1 Channel
Maximum Baud Rate
15 MBd(Typ)
Maximum Forward Diode Voltage
1.75 V
Maximum Reverse Diode Voltage
5 V
Maximum Power Dissipation
85 mW
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
No. Of Channels
1
Optocoupler Output Type
Logic Gate
Input Current
15mA
Output Voltage
7V
Opto Case Style
SOIC
No. Of Pins
8
Common Mode Ratio
15000
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
516-1633-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HCPL-060L-000E
Manufacturer:
AVAGO
Quantity:
40 000
13
Package Characteristics
All Typicals at T
Parameter
Input-Output
Insulation
Input-Output
Momentary
Withstand
Voltage**
Input-Output
Resistance
Input-Output
Capacitance
Input-Input
Insulation
Leakage
Current
Resistance
(Input-Input)
Capacitance
(Input-Input)
*The JEDEC Registration specifies 0˚C to +70˚C. Avago specifies –40˚C to +85˚C.
**The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous
voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-2 Insulation Characteristics Table (if applicable), your equip-
ment level safety specification or Avago Application Note 1074 entitled "Optocoupler Input-Output Endurance Voltage."
Notes:
10. The t
11. The t
12. CM
13. CM
14. For sinusoidal voltages, (|dV
15. No external pull up is required for a high logic state on the enable input. If the V
16. Device considered a two-terminal device: pins 1, 2, 3, and 4 shorted together, and pins 5, 6, 7, and 8 shorted together.
17. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 V rms for one second (leakage
18. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 6000 V rms for one second (leakage
19. Measured between the LED anode and cathode shorted together and pins 5 through 8 shorted together. For dual channel products only.
20. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together. For dual channel products only.
1. Each channel.
2. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not
3. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not
4. Derate linearly above +80˚C free-air temperature at a rate of 2.7 mW/˚C for the SOIC-8 package.
5. Bypassing of the power supply line is required, with a 0.1 μF ceramic disc capacitor adjacent to each optocoupler as illustrated in
6. The t
7. The t
8. t
9. See test circuit for measurement details.
exceed 20 mA.
exceed 15 mA.
Figure 11. Total lead length between both ends of the capacitor and the isolator pins should not exceed 20 mm.
of the output pulse.
of the output pulse.
conditions.
rising edge of the output pulse.
falling edge of the output pulse.
(i.e., V
(i.e., V
CMR performance. For single channel products only. See application information provided.
detection current limit, I
IEC/EN/DIN EN 60747-5-2 Insulation Characteristics Table, if applicable.
detection current limit, I
IEC/EN/DIN EN 60747-5-2 Insulation Characteristics Table, if applicable.
PSK
H
L
is equal to the worst case difference in t
is the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic state
PLH
PHL
ELH
ELH
is the maximum tolerable rate of rise on the common mode voltage to assure that the output will remain in a high logic state
o
o
> 2.0 V).
< 0.8 V).
propagation delay is measured from the 3.75 mA point on the falling edge of the input pulse to the 1.5 V point on the rising edge
propagation delay is measured from the 3.75 mA point on the rising edge of the input pulse to the 1.5 V point on the falling edge
enable propagation delay is measured from the 1.5 V point on the falling edge of the enable input pulse to the 1.5 V point on the
enable propagation delay is measured from the 1.5 V point on the rising edge of the enable input pulse to the 1.5 V point on the
A
Sym.
I
V
R
C
I
R
C
= 25˚C.
I-O
I-I
ISO
I-O
I-O
I-I
I-I
*
I-O
I-O
Package
Single 8-Pin DIP
Single SO-8
8-Pin DIP, SO-8
8-Pin, SO-8
8-Pin DIP, SO-8
Dual Channel
Dual Channel
Dual 8-Pin Dip
Dual SO-8
≤ 5 μA). This test is performed before the 100% production test for partial discharge (Method b) shown in the
≤ 5 μA). This test is performed before the 100% production test for partial discharge (Method b) shown in the
CM
| / dt)
max
= πf
PHL
CM
V
and/or t
CM
Min.
3750
(p-p).
PLH
that will be seen between units at any given temperature and specified test
Typ.
10
0.6
0.005
10
0.03
0.25
12
11
Max
1
E
Units
μA
V rms
Ω
pF
μA
Ω
pG
pin is not used, tying V
Test Conditions
45% RH, t = 5 s,
V
RH ≤ 50%, t = 1 min,
T
V
f = 1 MHz, T
RH ≤ 45%, t = 5 s,
V
f = 1 MHz
A
I-O
I-O
I-I
= 25˚C
= 500 V
= 3 kV DC, T
=500 V dc
E
A
to V
= 25˚C
A
CC
= 25˚C
will result in improved
Fig.
Note
16, 17
16, 17
1, 16, 19
1, 16, 19
20
20
20