AD9662ARQZ-REEL7 Analog Devices Inc, AD9662ARQZ-REEL7 Datasheet - Page 10

IC LASER DIODE DRIVER 3CH 16QSOP

AD9662ARQZ-REEL7

Manufacturer Part Number
AD9662ARQZ-REEL7
Description
IC LASER DIODE DRIVER 3CH 16QSOP
Manufacturer
Analog Devices Inc
Type
Laser Diode Driver (CD/DVD)r
Datasheet

Specifications of AD9662ARQZ-REEL7

Number Of Channels
3
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 85°C
Package / Case
16-LSSOP (0.154", 3.91mm Width)
Mounting Type
Surface Mount
Operating Supply Voltage (max)
5.5V
Operating Temperature (min)
0C
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
AD9662ARQZ-REEL7
AD9662ARQZ-REEL7TR
AD9662
APPLICATIONS
The AD9662 uses the current at one or more of its three
inputs—I
proportional to the input currents. Channel R has a typical gain
of 135 mA/mA, Channel 2 has a typical gain of 130 mA/mA,
and Channel 3 has a typical gain of 260 mA/mA. The input
impedance of Channel R and Channel 2 is typically 200 Ω, and
the input impedance of Channel 3 is typically 100 Ω. In most
cases, a voltage output DAC is used to set the dc current of
these channels. A series resistor should be placed between each
DAC’s output and its respective input channel. These resistors
should be chosen to properly scale the input current while not
excessively loading the output of the DAC.
Channel R is used to provide bias current to the laser diode, and
Channel 2 and Channel 3 are used to set the amplitudes of the
current pulses that are required to write or erase the media. The
output pulses are created by applying TTL level pulses to the
channel enable pins while dc current is flowing into the input
pins. Channel 2 and Channel 3 are turned on and off according
to a predetermined write strategy (see Figure 14).
Due to the fast rise and fall time (<1 ns) required for the
operation of higher speed drives, trace lengths carrying high
speed signals, such as ENR, EN2, EN3, and the output current,
should be kept as short as possible to minimize series inductance.
A decoupling capacitor should be located near each V
and the ground return for the cathode of the laser diode should
be kept as short as possible.
Rise time, t
from 10% of its final value to 90% of its final value. Appropriately,
fall time, t
90% of its initial value to 10% of its initial value.
Propagation delay is defined as the time when a transitioning
logic signal reaches 50% of its amplitude to when the output
current, I
TEMPERATURE CONSIDERATIONS
The AD9662 is in a 16-lead QSOP. JEDEC methods were used
to determine the θ
efficient thermally conductive test board (or 4-layer board).
This board is made of FR4, is 1.60 mm thick, and consists of
four copper layers. The two internal layers are solid copper
(1 ounce/in
(containing the component and back side traces) use
2 ounces/in
construction yields a θ
105°C/W. An integrated circuit dissipating 500 mW and
packaged in a QSOP, while operating in an ambient
environment of 85°C, has an internal junction temperature
of approximately 138°C.
85°C + 0.500 W × 105°C/W = 138°C
INR
OUT
f
, is defined as the time a pulse requires to go from
r
2
2
, I
, is defined as the time a pulse requires to transition
, reaches 50% of its amplitude.
or 0.35 mm thick). The two surface layers
(0.70 mm thick) copper. This method of
IN2
, and I
JA
of the QSOP when mounted on a highly
IN3
JA
for the AD9662 of approximately
—and generates an output current
CC
pin,
Rev. C | Page 10 of 16
This junction temperature is within the maximum recommended
operating junction temperature of 150°C. Of course, this is not
a realistic method for mounting a laser diode driver in an
optical storage device. In an actual application, the laser diode
driver would most likely be mounted to a flexible circuit board.
The θ
material. The user must consider these conditions carefully.
Some of the circuitry of the AD9662 can be used to monitor the
internal junction temperature. The AD9662 uses diodes to
protect it from electrostatic discharge (ESD). Every input pin
has a diode between it and ground, with the anode connected to
ground and the cathode connected to the particular input pin.
The base-emitter junction of a PNP transistor is used for ESD
protection from each pin to V
connected to the substrate of the die (see Figure 15). The base-
emitter junction of this transistor can be used to monitor the
internal die temperature of the IC.
Using a 10 V source at the enable pin to forward-bias the
base-emitter junction and a 1 MΩ resistor to limit the current, a
2-point measurement can be used to calculate the junction
temperature of the IC. Because the enable pin (ENABLE) needs
to be a logic high for normal operation, the AD9662 can be
operated with the 10 V applied through the 1 MΩ resistor.
The first point is obtained by measuring the voltage, V1, with
I
temperature, T1, can be measured using a thermocouple. The
temperature of the case is measured immediately after the IC is
turned on, and that temperature is the temperature of the
transistor junction and of the die itself. Through characterization
of the AD9662, it was determined that the forward-bias voltage
of the base-emitter junction of the transistor decreases by
1.9 mV for every 1°C rise in junction temperature.
The second point of the 2-point measurement is obtained when
the AD9662 is operated under load. I
increase in supply current is 200 mA. The AD9662 is allowed to
reach thermal equilibrium, and then the voltage, V2, is measured.
The voltage measurements taken with the IC running are lower
than the actual base-emitter drop across the transistor due to
the voltage drops across the internal resistance that is in series
with the supply current (see Figure 15). This finite resistance
was calculated to be approximately 120 mΩ. Therefore, for a
supply current change of 200 mA, the ΔV
24 mV too low. Therefore, 24 mV must be added to the
difference in measured voltages. The change in the base-
emitter voltage is then calculated.
OUT
= 0 immediately after the AD9662 is turned on. The case
ΔV
JA
of a system is highly dependent on board layout and
BE
= (V2 + 24 mV – V1)
CC
. The collector is electrically
OUT
is adjusted until the
BE
calculation is

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