MT47H32M16BN-5E:D TR Micron Technology Inc, MT47H32M16BN-5E:D TR Datasheet - Page 16
![IC DDR2 SDRAM 512MBIT 5NS 84FBGA](/photos/7/23/72318/mfg557-84-fbga_sml.jpg)
MT47H32M16BN-5E:D TR
Manufacturer Part Number
MT47H32M16BN-5E:D TR
Description
IC DDR2 SDRAM 512MBIT 5NS 84FBGA
Manufacturer
Micron Technology Inc
Datasheet
1.MT47H128M4BT-37EA_TR.pdf
(129 pages)
Specifications of MT47H32M16BN-5E:D TR
Format - Memory
RAM
Memory Type
DDR2 SDRAM
Memory Size
512M (32Mx16)
Speed
5ns
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 85°C
Package / Case
84-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1214-2
MT47H32M16BN-5E:D TR
MT47H32M16BN-5E:D TR
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Table 3: FBGA 84-Ball – x16 and 60-Ball – x4, x8 Descriptions (Continued)
PDF: 09005aef82f1e6e2
512MbDDR2.pdf - Rev. O 7/09 EN
UDQS, UDQS#
RDQS, RDQS#
LDQS, LDQS#
DQS, DQS#
Symbol
V
V
V
V
V
RFU
V
V
NC
NU
NF
DDQ
SSDL
DDL
REF
SSQ
DD
SS
Output
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Type
I/O
I/O
I/O
–
–
–
–
Description
Data strobe: Output with read data, input with write data for source synchronous oper-
ation. Edge-aligned with read data, center-aligned with write data. DQS# is only used
when differential data strobe mode is enabled via the LOAD MODE command.
Data strobe for lower byte: Output with read data, input with write data for source
synchronous operation. Edge-aligned with read data, center-aligned with write data.
LDQS# is only used when differential data strobe mode is enabled via the LOAD MODE
command.
Data strobe for upper byte: Output with read data, input with write data for source
synchronous operation. Edge-aligned with read data, center-aligned with write data.
UDQS# is only used when differential data strobe mode is enabled via the LOAD MODE
command.
Redundant data strobe: For 64 Meg x 8 only. RDQS is enabled/disabled via the load
mode command to the extended mode register (EMR). When RDQS is enabled, RDQS is
output with read data only and is ignored during write data. When RDQS is disabled, ball
B3 becomes data mask (see DM ball). RDQS# is only used when RDQS is enabled and dif-
ferential data strobe mode is enabled.
Power supply: 1.8V ±0.1V.
DQ power supply: 1.8V ±0.1V. Isolated on the device for improved noise immunity.
DLL power supply: 1.8V ±0.1V.
SSTL_18 reference voltage (V
Ground.
DLL ground: Isolated on the device from V
DQ ground: Isolated on the device for improved noise immunity.
No connect: These balls should be left unconnected.
No function: x8: these balls are used as DQ[7:4]; x4: they are no function.
Not used: If EMR(E10) = 0: x16, A8 = UDQS# and E8 = LDQS#; x8, A2 = RDQS# and A8 =
DQS#; x4, A2 = NU and A8 = NU. If EMR(E10) = 1: x16, A8 = NU and E8 = NU; x8, A2 = NU
and A8 = NU; x4, A2 = NU and A8 = NU.
Reserved for future use: Bank address BA2, row address bits A13 (x16 only), A14, and
A15.
16
DDQ
/2).
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Ball Assignments and Descriptions
512Mb: x4, x8, x16 DDR2 SDRAM
SS
and V
SSQ
.
©2004 Micron Technology, Inc. All rights reserved.
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