MT47H32M16BN-25:D TR Micron Technology Inc, MT47H32M16BN-25:D TR Datasheet - Page 57
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MT47H32M16BN-25:D TR
Manufacturer Part Number
MT47H32M16BN-25:D TR
Description
IC DDR2 SDRAM 512MBIT 84FBGA
Manufacturer
Micron Technology Inc
Datasheet
1.MT47H128M4BT-37EA_TR.pdf
(129 pages)
Specifications of MT47H32M16BN-25:D TR
Format - Memory
RAM
Memory Type
DDR2 SDRAM
Memory Size
512M (32Mx16)
Speed
2.5ns
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 85°C
Package / Case
84-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 30: DDR2-400/533
All units are shown in picoseconds
PDF: 09005aef82f1e6e2
512MbDDR2.pdf - Rev. O 7/09 EN
(V/ns)
Slew
Rate
DQ
2.0
1.5
1.0
0.9
0.8
0.7
0.6
0.5
0.4
t
125
83
4.0 V/ns
DS
Δ
0
–
–
–
–
–
–
t
DH
45
21
Δ
0
–
–
–
–
–
–
t
125
–11
Notes:
DS
83
3.0 V/ns
Δ
0
–
–
–
–
–
t
–14
DH
45
21
Δ
0
–
–
–
–
–
t
DS,
1. For all input signals, the total
2.
3.
4. Although the total setup time might be negative for slow slew rates (a valid input signal
5. For slew rates between the values listed in this table, the derating values may be ob-
6. These values are typically not subject to production test. They are verified by design and
7. Single-ended DQS requires special derating. The values in Table 32 (page 59) are the
t
sheet value to the derating value listed in Table 30.
t
crossing of V
signal is defined as the slew rate between the last crossing of V
ing of V
between the shaded “V
value (see Figure 26 (page 61)). If the actual signal is later than the nominal slew rate
line anywhere between the shaded “V
line to the actual signal from the AC level to DC level is used for the derating value (see
Figure 27 (page 61)).
t
crossing of V
signal is defined as the slew rate between the last crossing of V
ing of V
between the shaded “DC level to V
rating value (see Figure 28 (page 62)). If the actual signal is earlier than the nominal
slew rate line anywhere between shaded “DC to V
gent line to the actual signal from the DC level to V
value (see Figure 29 (page 62)).
will not have reached V
put signal is still required to complete the transition and reach V
tained by linear interpolation.
characterization.
DQS single-ended slew rate derating with DQS referenced at V
the logic levels
to the AC/DC trip points to DQ referenced to V
Table 35 (page 60). Table 34 provides the V
(
the DQ (
125
–11
–25
t
83
DS nominal slew rate for a rising signal is defined as the slew rate between the last
DH nominal slew rate for a rising signal is defined as the slew rate between the last
t
2.0 V/ns
DS
Δ
0
–
–
–
–
DS
DH Derating Values with Differential Strobe
a
and
t
–14
–31
DH
45
21
Δ
0
–
–
–
–
IL(AC)max
REF(DC)
t
DS
t
DH
a
DQS, DQS# Differential Slew Rate
t
REF(DC)
IL(DC)max
–13
–31
and
DS
95
12
1.8 V/ns
a
Δ
. If the actual signal is always later than the nominal slew rate line
–
1
–
–
–
) for DDR2-533. Table 35 provides the V
t
. If the actual signal is always earlier than the nominal slew rate line
DS
t
DH
b
t
–19
–42
and the first crossing of V
DH
33
12
–2
Δ
and
–
–
–
–
and the first crossing of V
a
) for DDR2-400.
IH[AC]
REF(DC)
t
DH
t
–19
–43
57
DS
24
13
–1
1.6 V/ns
Δ
–
–
–
–
b
/V
. Converting the derated base values from DQ referenced
t
to AC region,” use the nominal slew rate for the derating
DS and
IL[AC]
t
–30
–59
DH
24
10
–7
Δ
–
–
–
–
REF(DC)
at the time of the rising clock transition), a valid in-
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
t
REF(DC)
–31
–74
DH required is calculated by adding the data
DS
25
11
–7
1.4 V/ns
Δ
–
–
–
–
512Mb: x4, x8, x16 DDR2 SDRAM
region,” use the nominal slew rate for the de-
REF
t
IH(AC)min
to AC region,” the slew rate of a tangent
–18
–47
–89
DH
22
-based fully derated values for the DQ
Δ
–
–
–
5
–
REF(DC)
REF
is listed in Table 34 (page 60) and
REF(DC)
–127 –140 –115 –128 –103 –116
Input Slew Rate Derating
t
–19
–62
REF(DC)
23
DS
1.2 V/ns
Δ
.
.
–
–
–
–
5
t
t
REF
DH nominal slew rate for a falling
DS nominal slew rate for a falling
-based fully derated values for
region,” the slew rate of a tan-
t
–35
–77
level is used for the derating
DH
17
–6
Δ
–
–
–
–
©2004 Micron Technology, Inc. All rights reserved.
IH(DC)min
REF
REF(DC)
t
–50
IH(AC)
DS
17
–7
1.0 V/ns
Δ
–
–
–
–
–
and DQ referenced at
/V
and the first cross-
and the first cross-
t
–23
–65
DH
IL(AC)
Δ
–
–
–
–
–
6
.
t
–38
DS
0.8 V/ns
Δ
5
–
–
–
–
–
–
t
–11
–53
DH
Δ
–
–
–
–
–
–