LH28F640SPHT-PTL12 Sharp Microelectronics, LH28F640SPHT-PTL12 Datasheet - Page 17

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LH28F640SPHT-PTL12

Manufacturer Part Number
LH28F640SPHT-PTL12
Description
IC FLASH 64MBIT 120NS 56TSOP
Manufacturer
Sharp Microelectronics
Datasheet

Specifications of LH28F640SPHT-PTL12

Rohs Status
RoHS non-compliant
Format - Memory
FLASH
Memory Type
Page Mode FLASH
Memory Size
64M (8Mx8, 4Mx16)
Speed
120ns
Interface
Parallel
Operating Temperature
-40°C ~ 85°C
Package / Case
56-TSOP
Voltage - Supply
-
Other names
425-1857

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LH28F640SPHT-PTL12
Manufacturer:
SHARP
Quantity:
998
NOTE:
1. When the device is configured in one of the pulse modes, the STS pin pulses low with a typical pulse width of 250ns.
DQ
DQ
In STS configuration = "00", STS is V
executing internal erase or program algorithms.
STS configuration codes "01", "10" and "11" are all pulse
modes such that the STS pin pulses low then high when the
operation indicated by the configuration code is completed.
15
1
00 = level mode: RY/BY# indication. (Default)
01 = pulse mode on erase complete.
10 = pulse mode on program complete.
11 = pulse mode on erase or program complete.
-DQ
-DQ
15
R
R
7
0
2
= STS CONFIGURATION CODE (CC)
= RESERVED FOR FUTURE
ENHANCEMENTS (R)
14
R
R
6
13
R
R
5
OL
Table 9. STS Configuration Definition
when the WSM is
12
R
R
4
LHF64P01
After power-up or device reset, STS configuration is set to
"00".
STS configuration 00
STS configuration 01
STS configuration 10
STS configuration 11
that the erase operation is completed and the flash memory
The output of the STS pin is the control signal to prevent
accessing a flash memory while the internal WSM is busy
(SR.7="0").
The output of the STS pin is the control signal to indicate
is available for the next operation.
The output of the STS pin is the control signal to indicate
that the program operation is completed and the flash
memory is available for the next operation.
The output of the STS pin is the control signal to indicate
that the erase or program operation is completed and the
flash memory is available for the next operation.
11
R
R
3
(1)
10
R
R
2
NOTES:
CC
R
9
1
Rev. 0.06
CC
R
8
0
15

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