IDT71321SA55J IDT, Integrated Device Technology Inc, IDT71321SA55J Datasheet - Page 12

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IDT71321SA55J

Manufacturer Part Number
IDT71321SA55J
Description
IC SRAM 16KBIT 55NS 52PLCC
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT71321SA55J

Format - Memory
RAM
Memory Type
SRAM - Dual Port, Asynchronous
Memory Size
16K (2K x 8)
Speed
55ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
71321SA55J

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DATA
Timing Waveform of Write with Port-to-Port Read and BUSY
NOTES:
1. To ensure that the earlier of the two ports wins. t
2. CE
3. OE = V
4. All timing is the same for the left and right ports. Port "A" may be either the left or right port. Port "B" is opposite from port "A".
Timing Waveform of Write with BUSY
NOTES:
1. t
2. BUSY is asserted on port "B" blocking R/W
3. t
4. All timing is the same for the left and right ports. Port "A" may be either the left or right port. Port "B" is opposite from port "A".
IDT71321SA/LA and IDT71421SA/LA
High Speed 2K x 8 Dual-Port Static RAM with Interrupts
DATA
ADDR
BUSY
WH
WB
ADDR
L
OUT"B"
must be met for both BUSY input (IDT71421, slave) or output (IDT71321, Master).
R/W
is only for the slave version (IDT71421).
= CE
IN "A"
IL
"B"
"B"
"A"
for the reading port.
"A"
R
= V
IL
BUSY
R/W
R/W
"B"
"B"
"A"
t
APS
(1)
"B"
, until BUSY
APS
is ignored for Slave (IDT71421).
"B"
t
WB
goes HIGH.
t
BAA
(3)
MATCH
t
WC
t
6.42
(2)
WP
12
(4)
t
WP
MATCH
t
VALID
Industrial and Commercial Temperature Ranges
DW
t
t
WDD
WH
t
BDA
(1)
t
DDD
2691 drw 11
t
DH
t
BDD
(2,3,4)
,
VALID
2691 drw 10

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