AT45DB321D-TU Atmel, AT45DB321D-TU Datasheet - Page 24
![IC FLASH 32MBIT 66MHZ 28TSOP](/photos/7/21/72191/313-28-tsop_sml.jpg)
AT45DB321D-TU
Manufacturer Part Number
AT45DB321D-TU
Description
IC FLASH 32MBIT 66MHZ 28TSOP
Manufacturer
Atmel
Specifications of AT45DB321D-TU
Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
32M (8192 pages x 528 bytes)
Speed
66MHz
Interface
SPI, RapidS
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
28-TSOP
Architecture
Sectored
Interface Type
SPI
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Current
15 mA
Mounting Style
SMD/SMT
Organization
528 B x 8192
Memory Configuration
8192 Pages X 528 Bytes
Clock Frequency
20MHz
Supply Voltage Range
2.7V To 3.6V
Memory Case Style
TSOP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT45DB321D-TU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
12. Deep Power-down
12.1
24
Resume from Deep Power-down
AT45DB321D
After initial power-up, the device will default in standby mode. The Deep Power-down command
allows the device to enter into the lowest power consumption mode. To enter the Deep Power-
down mode, the CS pin must first be asserted. Once the CS pin has been asserted, an opcode
of B9H command must be clocked in via input pin (SI). After the last bit of the command has
been clocked in, the CS pin must be de-asserted to initiate the Deep Power-down operation.
After the CS pin is de-asserted, the device will enter the Deep Power-down mode within the
maximum t
are ignored except for the Resume from Deep Power-down command.
Figure 12-1. Deep Power-down
The Resume from Deep Power-down command takes the device out of the Deep Power-down
mode and returns it to the normal standby mode. To Resume from Deep Power-down mode, the
CS pin must first be asserted and an opcode of ABH command must be clocked in via input pin
(SI). After the last bit of the command has been clocked in, the CS pin must be de-asserted to
terminate the Deep Power-down mode. After the CS pin is de-asserted, the device will return to
the normal standby mode within the maximum t
the t
down, the device will return to the normal standby mode.
Figure 12-2. Resume from Deep Power-Down
Command
Deep Power-down
Command
Resume from Deep Power-down
RDPD
time before the device can receive any commands. After resuming form Deep Power-
EDPD
time. Once the device has entered the Deep Power-down mode, all instructions
CS
CS
SI
SI
Each transition
represents 8 bits
Each transition
represents 8 bits
Opcode
Opcode
RDPD
time. The CS pin must remain high during
Opcode
B9H
Opcode
ABH
3597O–DFLASH–10/09