24LC025-I/P Microchip Technology, 24LC025-I/P Datasheet - Page 10
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24LC025-I/P
Manufacturer Part Number
24LC025-I/P
Description
IC EEPROM 2KBIT 400KHZ 8DIP
Manufacturer
Microchip Technology
Specifications of 24LC025-I/P
Memory Size
2K (256 x 8)
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Memory Configuration
256 X 8
Ic Interface Type
I2C
Clock Frequency
400kHz
Supply Voltage Range
2.5V To 5.5V
Memory Case Style
DIP
No. Of Pins
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
24LC025I/P
24AA024/24LC024/24AA025/24LC025
8.0
Read operations are initiated in the same way as write
operations, with the exception that the R/W bit of the
slave address is set to ‘1’. There are three basic types
of read operations: current address read, random read
and sequential read.
8.1
The 24AA024/24LC024/24AA025/24LC025 contains
an address counter that maintains the address of the
last word accessed, internally incremented by one.
Therefore, if the previous read access was to address
n, the next current address read operation would
access data from address n + 1. Upon receipt of the
slave address with the R/W bit set to ‘1’, the 24AA024/
24LC024/24AA025/24LC025 issues an acknowledge
and transmits the 8-bit data word. The master will not
acknowledge the transfer, but does generate a Stop
condition
24LC025 discontinues transmission (Figure 8-1).
8.2
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, the word address must first
be set. This is accomplished by sending the word
address to the 24AA024/24LC024/24AA025/24LC025
as part of a write operation. Once the word address is
sent, the master generates a Start condition following
the acknowledge. This terminates the write operation,
but not before the internal Address Pointer is set. The
master then issues the control byte again, but with the
R/W bit set to a ‘1’. The 24AA024/24LC024/24AA025/
24LC025 will then issue an acknowledge and transmits
the eight bit data word. The master will not acknowl-
edge the transfer but does generate a Stop condition
and
discontinues transmission (Figure 8-2). After this
command, the internal address counter will point to the
address location following the one that was just read.
DS21210N-page 10
the
READ OPERATIONS
Current Address Read
Random Read
and
24AA024/24LC024/24AA025/24LC025
the
24AA024/24LC024/24AA025/
8.3
Sequential reads are initiated in the same way as a
random read except that after the 24AA024/24LC024/
24AA025/24LC025 transmits the first data byte, the
master issues an acknowledge (as opposed to a Stop
condition in a random read). This directs the 24AA024/
24LC024/24AA025/24LC025 to transmit the next
sequentially-addressed 8-bit word (Figure 8-3).
To provide sequential reads, the 24AA024/24LC024/
24AA025/24LC025 contains an internal Address
Pointer that is incremented by one upon completion of
each operation. This Address Pointer allows the entire
memory contents to be serially read during one
operation.
automatically roll over from address 0FFh to address
000h.
FIGURE 8-1:
SDA LINE
BUS ACTIVITY
BUS ACTIVITY
MASTER
Sequential Read
The
R
S
T
A
T
S
internal
Control
CURRENT ADDRESS
READ
Byte
© 2009 Microchip Technology Inc.
Address
C
A
K
Data
Pointer
N
O
A
C
K
O
S
T
P
P
will