ZLF645E0H2864G00TR Maxim Integrated, ZLF645E0H2864G00TR Datasheet - Page 27
ZLF645E0H2864G00TR
Manufacturer Part Number
ZLF645E0H2864G00TR
Description
8-bit Microcontrollers - MCU Crimzon Flash Infrared MCU
Manufacturer
Maxim Integrated
Datasheet
1.ZLF645E0H4864G2204.pdf
(201 pages)
Specifications of ZLF645E0H2864G00TR
Core
Z8
Data Bus Width
8 bit
Maximum Clock Frequency
8 MHz
Program Memory Size
64 KB
Data Ram Size
1 KB
Operating Supply Voltage
2 V to 3.6 V
Package / Case
SSOP-28
Mounting Style
SMD/SMT
Interface Type
UART
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Number Of Programmable I/os
5
Number Of Timers
2 x 8 bit, 1 x 16 bit
Processor Series
ZLF645
Program Memory Type
Flash
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PS026408-1208
Table 11. I/O Port Control Registers
12-Bit
000
001
002
003
F08
F09
0F6
0F7
0F8
F00
Note:
Address (Hex)
Bank
0–3
0–3
0–3
0–3
0–3
All
All
All
F
F
During POR and WDT Reset, the internally generated reset drives the reset pin Low for
the POR time. Any device driving the external reset line must be open-drain to avoid
damage from a possible conflict during reset conditions. A pull-up is provided internally
for the reset pin, if available. When the ZLF645 MCU asserts (Low) the RESET pin, the
internal pull-up is disabled. The ZLF645 MCU does not assert the RESET pin when the
VDD voltage is below the VBO trip point level (for more details, see
Management
The external reset does not initiate an exit from STOP mode.
Table 11
affected by control registers for other peripheral functions.
8-Bit Register Description
F6
F7
F8
00
01
02
03
08
09
00
lists the registers used to control I/O ports. Some port pin functions can also be
on page 137).
Port 0 Register
Port 1 Register
Port 2 Register
Port 3 Register
Port 4 Register
Port 4 Mode Register
Port 2 Mode Register
Port 3 Mode Register
Port 0/1 Mode Register
Port Configuration Register
Mnemonic
P0
P1
P2
P3
P4
P4M
P2M
P3M
P01M
PCON
ZLF645 Series Flash MCUs
Reset
XXh
XXh
XXh
0Xh
XXh
FFh
FFh
X X X X _ X 0 0 0 b
X 1 X X _ X XX1 b
X X X X _ 1 1 1 0 b
Product Specification
RESET (Input, Active Low)
Reset and Power
Page No
32
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