C8051F313R Silicon Labs, C8051F313R Datasheet - Page 85

• Manufacturer Part Number: C8051F313R
• Description: 8-bit Microcontrollers - MCU 8KB 10ADC
• Manufacturer: Silicon Labs

Specifications of C8051F313R

• Product Category: 8-bit Microcontrollers - MCU
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 8 KB
• Data Ram Size: 1.25 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.7 V to 3.6 V
• Package / Case: QFN-28
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 17
• Data Rom Size: 128 B
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 25
• Number Of Timers: 5
• On-chip Dac: No
• Processor Series: C8051
• Program Memory Type: Flash
• Factory Pack Quantity: 1500
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V

8.2.
The memory organization of the CIP-51 System Controller is similar to that of a standard 8051. There are
two separate memory spaces: program memory and data memory. Program and data memory share the
same address space but are accessed via different instruction types. The CIP-51 memory organization is
shown in Figure 8.2.
8.2.1. Program Memory
The CIP-51 core has a 64k-byte program memory space. The C8051F310/1 and C8051F312/3/4/5 imple-
ment 16 and 8 kB, respectively, of this program memory space as in-system, re-programmable Flash
memory, organized in a contiguous block from addresses 0x0000 to 0x3FFF or 0x0000 to 0x1FFF.
Addresses above 0x3E00 are reserved on the 16 kB devices.
Program memory is normally assumed to be read-only. However, the CIP-51 can write to program memory
by setting the Program Store Write Enable bit (PSCTL.0) and using the MOVX instruction. This feature pro-
vides a mechanism for the CIP-51 to update program code and use the program memory space for non-
volatile data storage. Refer to
Memory Organization
0x3DFF
0x1FFF
0x3E00
0x0000
0x2000
0x0000
PROGRAM/DATA MEMORY
Programmable in 512
Programmable in 512
C8051F312/3/4/5
C8051F310/1
Byte Sectors)
Byte Sectors)
RESERVED
RESERVED
16 kB Flash
(In-System
(In-System
8 kB Flash
(Flash)
Section “10. Flash Memory” on page 111
Figure 8.2. Memory Map
0xFFFF
0x03FF
0x0400
0x0000
0xFF
0x80
0x7F
0x30
0x2F
0x20
0x1F
0x00
Rev. 1.7
XRAM - 1024 Bytes
0x0000 to 0x03FF, wrapped
(accessable using MOVX
Same 1024 bytes as from
(Indirect Addressing
C8051F310/1/2/3/4/5/6/7
(Direct and Indirect
INTERNAL DATA ADDRESS SPACE
EXTERNAL DATA ADDRESS SPACE
General Purpose
Upper 128 RAM
on 1 kB boundaries
Bit Addressable
Addressing)
instruction)
Registers
Only)
DATA MEMORY (RAM)
for further details.
(Direct Addressing Only)
Special Function
Lower 128 RAM
(Direct and Indirect
Addressing)
Register's
85