C8051F313R Silicon Labs, C8051F313R Datasheet - Page 103

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C8051F313R

Manufacturer Part Number
C8051F313R
Description
8-bit Microcontrollers - MCU 8KB 10ADC
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F313R

Product Category
8-bit Microcontrollers - MCU
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
8 KB
Data Ram Size
1.25 KB
On-chip Adc
Yes
Operating Supply Voltage
2.7 V to 3.6 V
Package / Case
QFN-28
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
17
Data Rom Size
128 B
Interface Type
I2C, SMBus, SPI, UART
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
25
Number Of Timers
5
On-chip Dac
No
Processor Series
C8051
Program Memory Type
Flash
Factory Pack Quantity
1500
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
8.4.2. Stop Mode
Setting the Stop Mode Select bit (PCON.1) causes the CIP-51 to enter Stop mode as soon as the instruc-
tion that sets the bit completes execution. In Stop mode the internal oscillator, CPU, and all digital peripher-
als are stopped; the state of the external oscillator circuit is not affected. Each analog peripheral (including
the external oscillator circuit) may be shut down individually prior to entering Stop Mode. Stop mode can
only be terminated by an internal or external reset. On reset, the CIP-51 performs the normal reset
sequence and begins program execution at address 0x0000.
If enabled, the Missing Clock Detector will cause an internal reset and thereby terminate the Stop mode.
The Missing Clock Detector should be disabled if the CPU is to be put to in STOP mode for longer than the
MCD timeout of 100 µsec.
Bits7–2: GF5–GF0: General Purpose Flags 5–0.
Bit1:
Bit0:
GF5
R/W
Bit7
These are general purpose flags for use under software control.
STOP: Stop Mode Select.
Setting this bit will place the CIP-51 in Stop mode. This bit will always be read as 0.
1: CPU goes into Stop mode (internal oscillator stopped).
IDLE: Idle Mode Select.
Setting this bit will place the CIP-51 in Idle mode. This bit will always be read as 0.
1: CPU goes into Idle mode. (Shuts off clock to CPU, but clock to Timers, Interrupts, Serial
Ports, and Analog Peripherals are still active.)
GF4
R/W
Bit6
SFR Definition 8.12.
GF3
R/W
Bit5
GF2
R/W
Bit4
Rev. 1.7
GF1
R/W
Bit3
PCON: Power Control
C8051F310/1/2/3/4/5/6/7
GF0
R/W
Bit2
STOP
R/W
Bit1
IDLE
R/W
Bit0
SFR Address:
00000000
Reset Value
0x87
103

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